JP2012204378A - 半導体素子 - Google Patents
半導体素子 Download PDFInfo
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- JP2012204378A JP2012204378A JP2011064668A JP2011064668A JP2012204378A JP 2012204378 A JP2012204378 A JP 2012204378A JP 2011064668 A JP2011064668 A JP 2011064668A JP 2011064668 A JP2011064668 A JP 2011064668A JP 2012204378 A JP2012204378 A JP 2012204378A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 184
- 239000012535 impurity Substances 0.000 claims abstract description 102
- 230000000737 periodic effect Effects 0.000 claims abstract description 67
- 230000007423 decrease Effects 0.000 claims description 8
- 230000015556 catabolic process Effects 0.000 abstract description 20
- 230000002093 peripheral effect Effects 0.000 description 39
- 238000010586 diagram Methods 0.000 description 12
- 238000005468 ion implantation Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 230000005684 electric field Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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Abstract
【解決手段】実施形態の半導体素子は、第1半導体層の上において、第1半導体層の主面に対し平行な方向に、第2半導体層と、第3半導体層と、がそれぞれ周期的に配列された周期的配列構造と、第3半導体層の上に設けられた第4半導体層と、第4半導体層の表面に選択的に設けられた第5半導体層と、制御電極と、周期的配列構造の外側の第1半導体層の上に設けられ、周期的配列構造に含まれる不純物濃度よりも不純物濃度が低い第6半導体層と、第1半導体層に電気的に接続された第1主電極と、第4半導体層と、第5半導体層と、に接続された第2主電極と、を備える。第1半導体層の主面に対して垂直な方向からみて、第2半導体層と、第3半導体層と、はそれぞれドット状に配置され、周期的配列構造の最外周の周期構造は、最外周以外の周期的配列構造の周期構造と異なる。
【選択図】図1
Description
(第1実施形態)
図1は、第1実施形態に係る半導体素子の模式図であり、(a)は、半導体素子の全体の概要を示す平面模式図、(b)は、(a)のα−β線に沿った位置の断面模式図である。
SJ構造80Aは、例えば、イオン注入と、結晶成長と、を繰り返す工程によって形成される。この場合、n形ピラー層11のそれぞれの不純物濃度、もしくは、p形ピラー層12のそれぞれの不純物濃度は、イオン注入の際に用いられるマスクの開口面積を変化させることで調整できる。例えば、特定の部分のピラー層の不純物濃度を選択的に低下させるには、特定の部分のピラー層の位置に対応するマスクの開口部の面積をより小さくすればよい。
図3は、参考例に係るスーパージャンクション構造の平面模式図である。
図3には、各ピラー層の位置と、マスクパターンの各開口部の位置と、の対応が分かるように、n形ピラー層11、p形ピラー層12等のほか、マスクパターン400に係る開口部410、420等が表示されている。
図5は、第1実施形態に係るスーパージャンクション構造の平面模式図である。
図1(b)の断面模式図は、例えば、図5のα’−β’の位置に対応している。
図6は、第2実施形態に係るスーパージャンクション構造を形成するためのマスクパターンの平面模式図である。
図7には、各ピラー層の位置と、マスクパターンの各開口部と、の対応が分かるように、n形ピラー層11、p形ピラー層12等のほか、マスクパターン50に係る開口部51、52等が表示されている。そのほか、図7には、素子領域1aにおける単位セル53の領域と、最外周における最外周単位セル54X、54Yの領域と、が表示されている。
図8は、第3実施形態に係るスーパージャンクション構造を形成するためのマスクパターンの平面模式図である。図8には、素子領域1aにおける単位セル63の領域と、最外周単位セル64X、64Yの領域と、が表示されている。
図9には、各ピラー層の位置と、マスクパターンの各開口部と、の対応が分かるように、n形ピラー層11、p形ピラー層12等のほか、マスクパターン60に係る開口部61、62等が表示されている。そのほか、図9には、素子領域1aにおける単位セル63の領域と、最外周における最外周単位セル64X、64Yの領域と、が表示されている。
1a 素子領域
1b 終端領域
1g ゲート配線
10 ドレイン層(第1半導体層)
11、11a n形ピラー層(第2半導体層)
12、12a p形ピラー層(第3半導体層)
13 ベース層(第4半導体層)
14 ソース層(第5半導体層)
15 高抵抗層
20 ゲート絶縁膜
21 ゲート電極(制御電極)
22 フィールド絶縁層
23 フィールドストップ層
24 フィールドストップ電極
25 ガードリング層
30 ドレイン電極
31 ソース電極
40、50、60、400 マスクパターン
41、41a、42、42a、51、51a、52、52a、61、61a、62、62a、410、410a、420、420a 開口部
43、53、63、430 単位セル
44X、44Y、54X、54Y、64X、64Y 最外周単位セル
80A、80B、80C、100 SJ構造(周期的配列構造)
90 領域
N1、N2、P1、P2 矢印
Claims (7)
- 第1導電形の第1半導体層と、
前記第1半導体層の上において、前記第1半導体層の主面に対し平行な方向に、第1導電形の第2半導体層と、第2導電形の第3半導体層と、がそれぞれ周期的に配列された周期的配列構造と、
前記第3半導体層の上に設けられた第2導電形の第4半導体層と、
前記第4半導体層の表面に選択的に設けられた第1導電形の第5半導体層と、
前記第2半導体層の一部と、前記第4半導体層と、前記第5半導体層の一部と、に絶縁膜を介して接する制御電極と、
前記周期的配列構造の外側の前記第1半導体層の上に設けられ、前記周期的配列構造に含まれる不純物濃度よりも不純物濃度が低い第1導電形の第6半導体層と、
前記第1半導体層に電気的に接続された第1主電極と、
前記第4半導体層と、前記第5半導体層と、に接続された第2主電極と、
を備え、
前記第1半導体層の主面に対して垂直な方向からみて、前記第1半導体層は、矩形状であり、前記第2半導体層と、前記第3半導体層と、はそれぞれドット状に配置され、
前記矩形の互いに対向する辺に対して平行な方向における前記周期的配列構造の最外周の前記周期構造と、前記辺に対して直交する方向における前記周期的配列構造の前記最外周の前記周期構造と、が、異なり、
前記周期的配列構造の最外周における前記第2半導体層および前記第3半導体層のいずれか一方の周期は、前記最外周に沿った前記最外周以外の前記周期的配列構造における前記第2半導体層および前記第3半導体層のいずれか他方の周期の2倍であることを特徴とする半導体素子。 - 第1導電形の第1半導体層と、
前記第1半導体層の上において、前記第1半導体層の主面に対し平行な方向に、第1導電形の第2半導体層と、第2導電形の第3半導体層と、がそれぞれ周期的に配列された周期的配列構造と、
前記第3半導体層の上に設けられた第2導電形の第4半導体層と、
前記第4半導体層の表面に選択的に設けられた第1導電形の第5半導体層と、
前記第2半導体層の一部と、前記第4半導体層と、前記第5半導体層の一部と、に絶縁膜を介して接する制御電極と、
前記周期的配列構造の外側の前記第1半導体層の上に設けられ、前記周期的配列構造に含まれる不純物濃度よりも不純物濃度が低い第1導電形の第6半導体層と、
前記第1半導体層に電気的に接続された第1主電極と、
前記第4半導体層と、前記第5半導体層と、に接続された第2主電極と、
を備え、
前記第1半導体層の主面に対して垂直な方向からみて、前記第2半導体層と、前記第3半導体層と、はそれぞれドット状に配置され、
前記周期的配列構造の最外周の周期構造は、前記最外周以外の前記周期的配列構造の周期構造と異なることを特徴とする半導体素子。 - 前記第1半導体層の主面に対して垂直な方向からみて、前記第1半導体層は、矩形状であり、
前記矩形の対向する一対の辺に対して平行な方向における前記周期的配列構造の最外周の前記周期構造と、前記辺に対して直交する方向における前記周期的配列構造の前記最外周の前記周期構造と、は、異なることを特徴とする請求項2記載の半導体素子。 - 前記周期的配列構造の最外周における前記第2半導体層および前記第3半導体層のいずれか一方の周期は、前記最外周に沿った前記最外周以外の前記周期的配列構造における前記第2半導体層および前記第3半導体層のいずれか他方の周期の2倍であることを特徴とする請求項2または3に記載の半導体素子。
- 前記周期的配列構造において、前記第2半導体層の不純物濃度と、前記第3半導体層の不純物濃度と、は、前記平行な方向および前記直交する方向において変化し、前記周期的配列構造の前記最外周の内側から前記周期的配列構造の前記最外周側に向かい、前記第2半導体層の不純物濃度と、前記第3半導体層の不純物濃度と、が段階的に低くなることを特徴とする請求項2〜4のいずれか1つに記載の半導体素子。
- 第1導電形の第1半導体層と、
前記第1半導体層の上において、前記第1半導体層の主面に対し平行な方向に、第1導電形の第2半導体層と、第2導電形の第3半導体層と、がそれぞれ周期的に配列された周期的配列構造と、
前記第3半導体層の上に設けられた第2導電形の第4半導体層と、
前記第4半導体層の表面に選択的に設けられた第1導電形の第5半導体層と、
前記第2半導体層の一部と、前記第4半導体層と、前記第5半導体層の一部と、に絶縁膜を介して接する制御電極と、
前記周期的配列構造の外側の前記第1半導体層の上に設けられ、前記周期的配列構造に含まれる不純物濃度よりも不純物濃度が低い第1導電形の第6半導体層と、
前記第1半導体層に電気的に接続された第1主電極と、
前記第4半導体層と、前記第5半導体層と、に接続された第2主電極と、
を備え、
前記第1半導体層の主面に対して垂直な方向からみて、前記第2半導体層は、ハニカム状に配置され、
前記第3半導体層は、前記第2半導体層によって取り囲まれ、
前記周期的配列構造の最外周の周期構造は、前記最外周以外の前記周期的配列構造の周期構造と異なることを特徴とする半導体素子。 - 前記第1半導体層の主面に対して垂直な方向からみて、前記第1半導体層は、矩形状であり、
前記矩形の互いに対向する辺に対して平行な方向において、前記第3半導体層の周期は、前記最外周以外の前記周期的配列構造における前記第3半導体層の周期と同じであり、
前記平行な方向に対して直交する方向において、前記第2半導体層の周期は、前記最外周以外の前記周期的配列構造における前記第3半導体層の周期と同じであることを特徴とする請求項6記載の半導体素子。
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