JP2011505697A5 - - Google Patents
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- JP2011505697A5 JP2011505697A5 JP2010535978A JP2010535978A JP2011505697A5 JP 2011505697 A5 JP2011505697 A5 JP 2011505697A5 JP 2010535978 A JP2010535978 A JP 2010535978A JP 2010535978 A JP2010535978 A JP 2010535978A JP 2011505697 A5 JP2011505697 A5 JP 2011505697A5
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- JP
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- Prior art keywords
- layer
- dimension
- mobility
- forming
- feature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000000463 material Substances 0.000 claims 12
- 239000004065 semiconductor Substances 0.000 claims 12
- 238000005530 etching Methods 0.000 claims 10
- 238000000034 method Methods 0.000 claims 7
- 238000001514 detection method Methods 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/948,235 | 2007-11-30 | ||
| US11/948,235 US8288756B2 (en) | 2007-11-30 | 2007-11-30 | Hetero-structured, inverted-T field effect transistor |
| PCT/US2008/013041 WO2009070252A1 (en) | 2007-11-30 | 2008-11-21 | A hetero-structured, inverted-t field effect transistor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011505697A JP2011505697A (ja) | 2011-02-24 |
| JP2011505697A5 true JP2011505697A5 (enExample) | 2011-06-23 |
| JP5498394B2 JP5498394B2 (ja) | 2014-05-21 |
Family
ID=40260725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010535978A Active JP5498394B2 (ja) | 2007-11-30 | 2008-11-21 | トランジスタ及びその形成方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US8288756B2 (enExample) |
| EP (1) | EP2220686A1 (enExample) |
| JP (1) | JP5498394B2 (enExample) |
| KR (1) | KR101392436B1 (enExample) |
| CN (1) | CN101884107B (enExample) |
| TW (1) | TWI450339B (enExample) |
| WO (1) | WO2009070252A1 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5285947B2 (ja) * | 2008-04-11 | 2013-09-11 | 株式会社東芝 | 半導体装置、およびその製造方法 |
| US8101486B2 (en) * | 2009-10-07 | 2012-01-24 | Globalfoundries Inc. | Methods for forming isolated fin structures on bulk semiconductor material |
| US8815677B2 (en) * | 2011-06-14 | 2014-08-26 | Intermolecular, Inc. | Method of processing MIM capacitors to reduce leakage current |
| CN102956686A (zh) * | 2011-08-18 | 2013-03-06 | 中国科学院微电子研究所 | 一种硅基锗纳米结构衬底及其制备方法 |
| FR2982421A1 (fr) * | 2011-11-09 | 2013-05-10 | Soitec Silicon On Insulator | Finfet a trois grilles sur seoi avec modulation de tension de seuil |
| US9583398B2 (en) | 2012-06-29 | 2017-02-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit having FinFETS with different fin profiles |
| US9142400B1 (en) | 2012-07-17 | 2015-09-22 | Stc.Unm | Method of making a heteroepitaxial layer on a seed area |
| CN103871885B (zh) * | 2012-12-18 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | 鳍式场效应晶体管的制作方法 |
| CN104103506B (zh) * | 2013-04-11 | 2018-02-13 | 中国科学院微电子研究所 | 半导体器件制造方法 |
| US20170309623A1 (en) * | 2016-04-21 | 2017-10-26 | Globalfoundries Inc. | Method, apparatus, and system for increasing drive current of finfet device |
| CN111383917B (zh) * | 2018-12-29 | 2023-02-21 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| CN118213404B (zh) * | 2024-03-06 | 2025-10-03 | 西安电子科技大学广州研究院 | 一种增强型p沟道氮化镓场效应晶体管及其制备方法 |
Family Cites Families (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60210831A (ja) * | 1984-04-04 | 1985-10-23 | Agency Of Ind Science & Technol | 化合物半導体結晶基板の製造方法 |
| JPH073814B2 (ja) * | 1984-10-16 | 1995-01-18 | 松下電器産業株式会社 | 半導体基板の製造方法 |
| DE68926256T2 (de) * | 1988-01-07 | 1996-09-19 | Fujitsu Ltd | Komplementäre Halbleiteranordnung |
| US5466949A (en) * | 1994-08-04 | 1995-11-14 | Texas Instruments Incorporated | Silicon oxide germanium resonant tunneling |
| US6362071B1 (en) * | 2000-04-05 | 2002-03-26 | Motorola, Inc. | Method for forming a semiconductor device with an opening in a dielectric layer |
| US6475890B1 (en) * | 2001-02-12 | 2002-11-05 | Advanced Micro Devices, Inc. | Fabrication of a field effect transistor with an upside down T-shaped semiconductor pillar in SOI technology |
| US6600170B1 (en) * | 2001-12-17 | 2003-07-29 | Advanced Micro Devices, Inc. | CMOS with strained silicon channel NMOS and silicon germanium channel PMOS |
| US6605514B1 (en) * | 2002-07-31 | 2003-08-12 | Advanced Micro Devices, Inc. | Planar finFET patterning using amorphous carbon |
| US6800910B2 (en) | 2002-09-30 | 2004-10-05 | Advanced Micro Devices, Inc. | FinFET device incorporating strained silicon in the channel region |
| US6872647B1 (en) * | 2003-05-06 | 2005-03-29 | Advanced Micro Devices, Inc. | Method for forming multiple fins in a semiconductor device |
| JP4277021B2 (ja) * | 2003-05-30 | 2009-06-10 | パナソニック株式会社 | 半導体装置 |
| US7045401B2 (en) * | 2003-06-23 | 2006-05-16 | Sharp Laboratories Of America, Inc. | Strained silicon finFET device |
| KR100487566B1 (ko) * | 2003-07-23 | 2005-05-03 | 삼성전자주식회사 | 핀 전계 효과 트랜지스터 및 그 형성 방법 |
| JP2005051241A (ja) * | 2003-07-25 | 2005-02-24 | Interuniv Micro Electronica Centrum Vzw | 多層ゲート半導体デバイス及びその製造方法 |
| EP1519420A2 (en) | 2003-09-25 | 2005-03-30 | Interuniversitaire Microelectronica Centrum vzw ( IMEC) | Multiple gate semiconductor device and method for forming same |
| US6855583B1 (en) * | 2003-08-05 | 2005-02-15 | Advanced Micro Devices, Inc. | Method for forming tri-gate FinFET with mesa isolation |
| FR2861501B1 (fr) | 2003-10-22 | 2006-01-13 | Commissariat Energie Atomique | Dispositif microelectronique a effet de champ apte a former un ou plusiseurs canaux de transistors |
| US20050116290A1 (en) * | 2003-12-02 | 2005-06-02 | De Souza Joel P. | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers |
| US7041576B2 (en) * | 2004-05-28 | 2006-05-09 | Freescale Semiconductor, Inc. | Separately strained N-channel and P-channel transistors |
| DE102005045078B4 (de) * | 2004-09-25 | 2009-01-22 | Samsung Electronics Co., Ltd., Suwon | Feldeffekttransistor mit einer verspannten Kanalschicht an Seitenwänden einer Struktur an einem Halbleitersubstrat |
| KR100674914B1 (ko) | 2004-09-25 | 2007-01-26 | 삼성전자주식회사 | 변형된 채널층을 갖는 모스 트랜지스터 및 그 제조방법 |
| US7393733B2 (en) * | 2004-12-01 | 2008-07-01 | Amberwave Systems Corporation | Methods of forming hybrid fin field-effect transistor structures |
| US7741182B2 (en) * | 2005-01-28 | 2010-06-22 | Nxp B.V. | Method of fabricating a dual gate FET |
| US7470951B2 (en) * | 2005-01-31 | 2008-12-30 | Freescale Semiconductor, Inc. | Hybrid-FET and its application as SRAM |
| US20060214233A1 (en) * | 2005-03-22 | 2006-09-28 | Ananthanarayanan Hari P | FinFET semiconductor device |
| KR101225816B1 (ko) * | 2005-05-17 | 2013-01-23 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 감소한 변위 결함 밀도를 가지는 래티스 미스매칭된 반도체구조 및 디바이스 제조를 위한 관련 방법 |
| US7344962B2 (en) * | 2005-06-21 | 2008-03-18 | International Business Machines Corporation | Method of manufacturing dual orientation wafers |
| US7323389B2 (en) * | 2005-07-27 | 2008-01-29 | Freescale Semiconductor, Inc. | Method of forming a FINFET structure |
| US7265059B2 (en) * | 2005-09-30 | 2007-09-04 | Freescale Semiconductor, Inc. | Multiple fin formation |
| US7396711B2 (en) * | 2005-12-27 | 2008-07-08 | Intel Corporation | Method of fabricating a multi-cornered film |
| US7709303B2 (en) * | 2006-01-10 | 2010-05-04 | Freescale Semiconductor, Inc. | Process for forming an electronic device including a fin-type structure |
| FR2896620B1 (fr) * | 2006-01-23 | 2008-05-30 | Commissariat Energie Atomique | Circuit integre tridimensionnel de type c-mos et procede de fabrication |
| US7544980B2 (en) * | 2006-01-27 | 2009-06-09 | Freescale Semiconductor, Inc. | Split gate memory cell in a FinFET |
| JP2007258485A (ja) | 2006-03-23 | 2007-10-04 | Toshiba Corp | 半導体装置及びその製造方法 |
| US20070235763A1 (en) * | 2006-03-29 | 2007-10-11 | Doyle Brian S | Substrate band gap engineered multi-gate pMOS devices |
| US7803670B2 (en) * | 2006-07-20 | 2010-09-28 | Freescale Semiconductor, Inc. | Twisted dual-substrate orientation (DSO) substrates |
| WO2008039495A1 (en) * | 2006-09-27 | 2008-04-03 | Amberwave Systems Corporation | Tri-gate field-effect transistors formed by aspect ratio trapping |
| US7692254B2 (en) * | 2007-07-16 | 2010-04-06 | International Business Machines Corporation | Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure |
-
2007
- 2007-11-30 US US11/948,235 patent/US8288756B2/en active Active
-
2008
- 2008-11-21 WO PCT/US2008/013041 patent/WO2009070252A1/en not_active Ceased
- 2008-11-21 JP JP2010535978A patent/JP5498394B2/ja active Active
- 2008-11-21 EP EP08853153A patent/EP2220686A1/en not_active Ceased
- 2008-11-21 CN CN2008801156452A patent/CN101884107B/zh active Active
- 2008-11-21 KR KR1020107011883A patent/KR101392436B1/ko active Active
- 2008-11-28 TW TW097146123A patent/TWI450339B/zh active
-
2012
- 2012-08-13 US US13/584,673 patent/US8815658B2/en active Active
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