JP2011249564A5 - - Google Patents
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- Publication number
- JP2011249564A5 JP2011249564A5 JP2010121337A JP2010121337A JP2011249564A5 JP 2011249564 A5 JP2011249564 A5 JP 2011249564A5 JP 2010121337 A JP2010121337 A JP 2010121337A JP 2010121337 A JP2010121337 A JP 2010121337A JP 2011249564 A5 JP2011249564 A5 JP 2011249564A5
- Authority
- JP
- Japan
- Prior art keywords
- metal film
- metal
- electrodes
- film
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims 68
- 229910052751 metal Inorganic materials 0.000 claims 68
- 239000004065 semiconductor Substances 0.000 claims 30
- 238000004519 manufacturing process Methods 0.000 claims 12
- 238000005530 etching Methods 0.000 claims 8
- 239000000758 substrate Substances 0.000 claims 7
- 239000010931 gold Substances 0.000 claims 4
- 229910000679 solder Inorganic materials 0.000 claims 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010121337A JP2011249564A (ja) | 2010-05-27 | 2010-05-27 | 半導体装置の製造方法及び実装構造 |
| US13/111,373 US8426303B2 (en) | 2010-05-27 | 2011-05-19 | Manufacturing method of semiconductor device, and mounting structure thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010121337A JP2011249564A (ja) | 2010-05-27 | 2010-05-27 | 半導体装置の製造方法及び実装構造 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2011249564A JP2011249564A (ja) | 2011-12-08 |
| JP2011249564A5 true JP2011249564A5 (enExample) | 2013-04-04 |
Family
ID=45021411
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010121337A Pending JP2011249564A (ja) | 2010-05-27 | 2010-05-27 | 半導体装置の製造方法及び実装構造 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8426303B2 (enExample) |
| JP (1) | JP2011249564A (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8759209B2 (en) | 2010-03-25 | 2014-06-24 | Stats Chippac, Ltd. | Semiconductor device and method of forming a dual UBM structure for lead free bump connections |
| DE102018117822A1 (de) | 2017-11-17 | 2019-05-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Drei-schritte-ätzen zum bilden einer rdl |
| US10522501B2 (en) * | 2017-11-17 | 2019-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and method of forming the same |
| WO2019125404A1 (en) * | 2017-12-19 | 2019-06-27 | Intel Corporation | Barrier materials between bumps and pads |
| KR102765303B1 (ko) | 2019-12-31 | 2025-02-07 | 삼성전자주식회사 | 반도체 패키지 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53131766A (en) * | 1977-04-22 | 1978-11-16 | Hitachi Ltd | Semiconductor device electrode structural body and production of the same |
| JPS59117135A (ja) * | 1982-12-24 | 1984-07-06 | Hitachi Ltd | 半導体装置の製造方法 |
| JPS61225839A (ja) * | 1985-03-29 | 1986-10-07 | Fujitsu Ltd | バンプ電極の形成方法 |
| JPH01120848A (ja) * | 1987-11-05 | 1989-05-12 | Seiko Epson Corp | 半導体装置及びその製造方法 |
| US5268072A (en) * | 1992-08-31 | 1993-12-07 | International Business Machines Corporation | Etching processes for avoiding edge stress in semiconductor chip solder bumps |
| JP3321351B2 (ja) * | 1996-01-18 | 2002-09-03 | 東芝マイクロエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US5937320A (en) * | 1998-04-08 | 1999-08-10 | International Business Machines Corporation | Barrier layers for electroplated SnPb eutectic solder joints |
| JP2001085457A (ja) * | 1999-09-10 | 2001-03-30 | Hitachi Ltd | 半導体ウエハ、半導体装置及びその製造方法 |
| JP2001257210A (ja) * | 2000-03-10 | 2001-09-21 | Hitachi Ltd | 半導体集積回路装置 |
| US6586323B1 (en) * | 2000-09-18 | 2003-07-01 | Taiwan Semiconductor Manufacturing Company | Method for dual-layer polyimide processing on bumping technology |
| JP2006120803A (ja) | 2004-10-20 | 2006-05-11 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
| JP2007317979A (ja) * | 2006-05-29 | 2007-12-06 | Toshiba Corp | 半導体装置の製造方法 |
| US7456090B2 (en) * | 2006-12-29 | 2008-11-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method to reduce UBM undercut |
| US8110508B2 (en) * | 2007-11-22 | 2012-02-07 | Samsung Electronics Co., Ltd. | Method of forming a bump structure using an etching composition for an under bump metallurgy layer |
| US20120098124A1 (en) * | 2010-10-21 | 2012-04-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device having under-bump metallization (ubm) structure and method of forming the same |
| JP2012204788A (ja) * | 2011-03-28 | 2012-10-22 | Renesas Electronics Corp | 半導体装置及び半導体装置の製造方法 |
-
2010
- 2010-05-27 JP JP2010121337A patent/JP2011249564A/ja active Pending
-
2011
- 2011-05-19 US US13/111,373 patent/US8426303B2/en active Active
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