JP2011249564A - 半導体装置の製造方法及び実装構造 - Google Patents

半導体装置の製造方法及び実装構造 Download PDF

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JP2011249564A
JP2011249564A JP2010121337A JP2010121337A JP2011249564A JP 2011249564 A JP2011249564 A JP 2011249564A JP 2010121337 A JP2010121337 A JP 2010121337A JP 2010121337 A JP2010121337 A JP 2010121337A JP 2011249564 A JP2011249564 A JP 2011249564A
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Prior art keywords
film
metal film
semiconductor device
metal
etching
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JP2010121337A
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Japanese (ja)
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JP2011249564A5 (enExample
Inventor
Yoshizo Suzuki
善三 鈴木
Michitaka Kimura
通孝 木村
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Renesas Electronics Corp
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Renesas Electronics Corp
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Priority to JP2010121337A priority Critical patent/JP2011249564A/ja
Priority to US13/111,373 priority patent/US8426303B2/en
Publication of JP2011249564A publication Critical patent/JP2011249564A/ja
Publication of JP2011249564A5 publication Critical patent/JP2011249564A5/ja
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    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides

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  • Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
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Families Citing this family (5)

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Publication number Priority date Publication date Assignee Title
US8759209B2 (en) 2010-03-25 2014-06-24 Stats Chippac, Ltd. Semiconductor device and method of forming a dual UBM structure for lead free bump connections
DE102018117822A1 (de) 2017-11-17 2019-05-23 Taiwan Semiconductor Manufacturing Co., Ltd. Drei-schritte-ätzen zum bilden einer rdl
US10522501B2 (en) * 2017-11-17 2019-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method of forming the same
WO2019125404A1 (en) * 2017-12-19 2019-06-27 Intel Corporation Barrier materials between bumps and pads
KR102765303B1 (ko) 2019-12-31 2025-02-07 삼성전자주식회사 반도체 패키지

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53131766A (en) * 1977-04-22 1978-11-16 Hitachi Ltd Semiconductor device electrode structural body and production of the same
JPS59117135A (ja) * 1982-12-24 1984-07-06 Hitachi Ltd 半導体装置の製造方法
JPS61225839A (ja) * 1985-03-29 1986-10-07 Fujitsu Ltd バンプ電極の形成方法
JPH01120848A (ja) * 1987-11-05 1989-05-12 Seiko Epson Corp 半導体装置及びその製造方法
JPH06112213A (ja) * 1992-08-31 1994-04-22 Internatl Business Mach Corp <Ibm> エッチング処理方法
JPH09199505A (ja) * 1996-01-18 1997-07-31 Toshiba Microelectron Corp 半導体装置およびその製造方法
JP2001085457A (ja) * 1999-09-10 2001-03-30 Hitachi Ltd 半導体ウエハ、半導体装置及びその製造方法
JP2001257210A (ja) * 2000-03-10 2001-09-21 Hitachi Ltd 半導体集積回路装置
JP2007317979A (ja) * 2006-05-29 2007-12-06 Toshiba Corp 半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5937320A (en) * 1998-04-08 1999-08-10 International Business Machines Corporation Barrier layers for electroplated SnPb eutectic solder joints
US6586323B1 (en) * 2000-09-18 2003-07-01 Taiwan Semiconductor Manufacturing Company Method for dual-layer polyimide processing on bumping technology
JP2006120803A (ja) 2004-10-20 2006-05-11 Fujitsu Ltd 半導体装置及び半導体装置の製造方法
US7456090B2 (en) * 2006-12-29 2008-11-25 Taiwan Semiconductor Manufacturing Co., Ltd. Method to reduce UBM undercut
US8110508B2 (en) * 2007-11-22 2012-02-07 Samsung Electronics Co., Ltd. Method of forming a bump structure using an etching composition for an under bump metallurgy layer
US20120098124A1 (en) * 2010-10-21 2012-04-26 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having under-bump metallization (ubm) structure and method of forming the same
JP2012204788A (ja) * 2011-03-28 2012-10-22 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53131766A (en) * 1977-04-22 1978-11-16 Hitachi Ltd Semiconductor device electrode structural body and production of the same
JPS59117135A (ja) * 1982-12-24 1984-07-06 Hitachi Ltd 半導体装置の製造方法
JPS61225839A (ja) * 1985-03-29 1986-10-07 Fujitsu Ltd バンプ電極の形成方法
JPH01120848A (ja) * 1987-11-05 1989-05-12 Seiko Epson Corp 半導体装置及びその製造方法
JPH06112213A (ja) * 1992-08-31 1994-04-22 Internatl Business Mach Corp <Ibm> エッチング処理方法
JPH09199505A (ja) * 1996-01-18 1997-07-31 Toshiba Microelectron Corp 半導体装置およびその製造方法
JP2001085457A (ja) * 1999-09-10 2001-03-30 Hitachi Ltd 半導体ウエハ、半導体装置及びその製造方法
JP2001257210A (ja) * 2000-03-10 2001-09-21 Hitachi Ltd 半導体集積回路装置
JP2007317979A (ja) * 2006-05-29 2007-12-06 Toshiba Corp 半導体装置の製造方法

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