JP2010238702A5 - - Google Patents

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Publication number
JP2010238702A5
JP2010238702A5 JP2009081922A JP2009081922A JP2010238702A5 JP 2010238702 A5 JP2010238702 A5 JP 2010238702A5 JP 2009081922 A JP2009081922 A JP 2009081922A JP 2009081922 A JP2009081922 A JP 2009081922A JP 2010238702 A5 JP2010238702 A5 JP 2010238702A5
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JP
Japan
Prior art keywords
semiconductor package
inorganic insulating
insulating film
manufacturing
opening
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Application number
JP2009081922A
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English (en)
Japanese (ja)
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JP2010238702A (ja
JP5296590B2 (ja
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Priority to JP2009081922A priority Critical patent/JP5296590B2/ja
Priority claimed from JP2009081922A external-priority patent/JP5296590B2/ja
Priority to US12/749,117 priority patent/US8288875B2/en
Publication of JP2010238702A publication Critical patent/JP2010238702A/ja
Publication of JP2010238702A5 publication Critical patent/JP2010238702A5/ja
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Publication of JP5296590B2 publication Critical patent/JP5296590B2/ja
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JP2009081922A 2009-03-30 2009-03-30 半導体パッケージの製造方法 Active JP5296590B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009081922A JP5296590B2 (ja) 2009-03-30 2009-03-30 半導体パッケージの製造方法
US12/749,117 US8288875B2 (en) 2009-03-30 2010-03-29 Method of manufacturing a semiconductor package and semiconductor package having an electrode pad with a small pitch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009081922A JP5296590B2 (ja) 2009-03-30 2009-03-30 半導体パッケージの製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013022824A Division JP5633095B2 (ja) 2013-02-08 2013-02-08 半導体パッケージの製造方法および半導体パッケージ

Publications (3)

Publication Number Publication Date
JP2010238702A JP2010238702A (ja) 2010-10-21
JP2010238702A5 true JP2010238702A5 (enExample) 2012-03-15
JP5296590B2 JP5296590B2 (ja) 2013-09-25

Family

ID=42783119

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009081922A Active JP5296590B2 (ja) 2009-03-30 2009-03-30 半導体パッケージの製造方法

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US (1) US8288875B2 (enExample)
JP (1) JP5296590B2 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101767108B1 (ko) * 2010-12-15 2017-08-11 삼성전자주식회사 하이브리드 기판을 구비하는 반도체 패키지 및 그 제조방법
WO2013089099A1 (ja) * 2011-12-12 2013-06-20 三菱マテリアル株式会社 パワーモジュール用基板、ヒートシンク付パワーモジュール用基板、パワーモジュール、フラックス成分侵入防止層形成用ペーストおよび接合体の接合方法
WO2013089754A1 (en) * 2011-12-15 2013-06-20 Intel Corporation Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (bbul) packages
US8653662B2 (en) * 2012-05-02 2014-02-18 International Business Machines Corporation Structure for monitoring stress induced failures in interlevel dielectric layers of solder bump integrated circuits
KR101921258B1 (ko) * 2012-05-09 2018-11-22 삼성전자주식회사 배선 기판 및 이를 포함하는 반도체 패키지
US9646928B2 (en) * 2014-03-13 2017-05-09 Taiwan Semiconductor Manufacturing Company Limited Semiconductor arrangement and formation thereof
TWI533771B (zh) * 2014-07-17 2016-05-11 矽品精密工業股份有限公司 無核心層封裝基板及其製法
US10325853B2 (en) * 2014-12-03 2019-06-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming semiconductor packages having through package vias
JP6510884B2 (ja) * 2015-05-19 2019-05-08 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置
US20170338204A1 (en) * 2016-05-17 2017-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Device and Method for UBM/RDL Routing
JP6562467B2 (ja) * 2016-06-21 2019-08-21 サムスン エレクトロニクス カンパニー リミテッド ファン−アウト半導体パッケージ
JP6867905B2 (ja) * 2017-07-18 2021-05-12 新光電気工業株式会社 配線基板、半導体装置、及び配線基板の製造方法
JP7172211B2 (ja) * 2017-07-28 2022-11-16 Tdk株式会社 導電性基板、電子装置及び表示装置
US10892213B2 (en) 2018-12-28 2021-01-12 Advanced Semiconductor Engineering, Inc. Wiring structure and method for manufacturing the same
US10790241B2 (en) 2019-02-28 2020-09-29 Advanced Semiconductor Engineering, Inc. Wiring structure and method for manufacturing the same
FI130166B (en) * 2019-03-08 2023-03-23 Picosun Oy Solder mask
US10978417B2 (en) 2019-04-29 2021-04-13 Advanced Semiconductor Engineering, Inc. Wiring structure and method for manufacturing the same
US11069605B2 (en) 2019-04-30 2021-07-20 Advanced Semiconductor Engineering, Inc. Wiring structure having low and high density stacked structures
US10903169B2 (en) 2019-04-30 2021-01-26 Advanced Semiconductor Engineering, Inc. Conductive structure and wiring structure including the same
US10861780B1 (en) 2019-05-13 2020-12-08 Advanced Semiconductor Engineering, Inc. Wiring structure and method for manufacturing the same
GB202018676D0 (en) * 2020-11-27 2021-01-13 Graphcore Ltd Controlling warpage of a substrate for mounting a semiconductor die
CN113990759B (zh) * 2020-12-21 2025-07-22 矽磐微电子(重庆)有限公司 半导体封装方法及半导体封装结构
US20240258478A1 (en) * 2021-10-27 2024-08-01 Hefei BOE Ruisheng Technology Co., Ltd. Light-emitting substrate, method for manufacturing the same, and display device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001326466A (ja) 2000-05-12 2001-11-22 Toshiba Chem Corp プリント配線板およびプリント配線板の製造方法
JP2003188313A (ja) * 2001-12-20 2003-07-04 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP4243117B2 (ja) * 2002-08-27 2009-03-25 新光電気工業株式会社 半導体パッケージとその製造方法および半導体装置
JP2005086071A (ja) * 2003-09-10 2005-03-31 Hitachi Chem Co Ltd 多層配線基板、半導体チップ搭載基板及び半導体パッケージ、並びにそれらの製造方法
JP2005327932A (ja) * 2004-05-14 2005-11-24 Shinko Electric Ind Co Ltd 多層配線基板及びその製造方法
JP5118300B2 (ja) * 2005-12-20 2013-01-16 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP4582004B2 (ja) * 2006-01-13 2010-11-17 セイコーエプソン株式会社 発光装置および電子機器
JP4765947B2 (ja) * 2007-01-25 2011-09-07 カシオ計算機株式会社 半導体装置およびその製造方法
US8749065B2 (en) * 2007-01-25 2014-06-10 Tera Probe, Inc. Semiconductor device comprising electromigration prevention film and manufacturing method thereof
JP5000540B2 (ja) * 2008-01-31 2012-08-15 新光電気工業株式会社 スイッチング機能付配線基板
JP4431628B1 (ja) * 2008-06-05 2010-03-17 新光電気工業株式会社 半導体装置及びその製造方法

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