JP2010225682A - 半導体装置およびその製造方法 - Google Patents
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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Abstract
【解決手段】半導体装置は、半導体基板1と、半導体基板1上に設けられ、シリコン、酸素、炭素および水素を含む、配線溝5が形成された絶縁膜3,4と、配線溝5内に設けられた金属配線8と、金属配線8の上面に選択的に形成されたメタルキャップ10とを具備してなり、絶縁膜4は、その表面を含む第1の領域と、第1の領域下の第2の領域とを備えており、前記第1の領域の炭素濃度は前記表面から深くなるに従って減少し、前記第2の領域内の炭素濃度は、前記第1の領域との界面から一定距離の深さまでは深くなるに従って減少し、前記一定の距離減を越えると深くなるに従って増加し、前記表面における炭素濃度を超えることを特徴とする。
【選択図】 図2
Description
図1および図2は、第1の実施形態に係る半導体装置の製造方法を説明するための断面図である。
本実施形態が第1の実施形態と異なる点は、表面領域9に対してウエット系の修復処理(疎水化処理)を行う工程の前または後の工程で、Si−OH基の発生の原因となる、キャップ絶縁膜4や表面領域9中の水分(OH基)を、除去するための加熱処理を行うことにある。
第1の実施形態では、Si−OH(親水基)を化学的にSi−CH3 (疎水基)に置き換えたが、本実施形態では、表面領域9の表面に疎水性物質、例えばポリアリレンを含む溶液を含浸させることにより、表面領域9の表面を疎水化することにある。表面領域9は、キャップ絶縁膜4に比べて密度が低いので、疎水性物質の含浸による疎水化は容易に行える。本実施形態でも第1の実施形態と同様の効果が得られる。
Claims (5)
- 半導体基板上にシリコン、酸素、炭素および水素を含む絶縁膜を形成する工程と、
前記絶縁膜に配線溝を形成する工程と、
前記配線溝を埋め込むように前記絶縁膜上に金属配線となる金属膜を形成する工程と、
前記配線溝の外の前記金属膜を除去し、前記配線溝内に前記金属配線を形成する工程と、
前記金属配線を形成する工程の後に、前記絶縁膜の表面に対して疎水化処理を行う工程と、
前記疎水化処理を行う工程の後に、めっきにより前記金属配線の上面にキャップメタルを選択的に形成する工程と
を含むことを特徴する半導体装置の製造方法。 - 前記疎水化処理は、前記絶縁膜の表面の親水基を化学的に疎水基に置換するウエット系の疎水化処理、前記絶縁膜の表面に疎水性物質を含浸させる疎水化処理、または、前記絶縁膜の表面を疎水性物質でコーティングする疎水化処理であることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記疎水化処理を行う工程の前または後に、前記絶縁膜中の水分を除去するための加熱処理を行う工程をさらに含むことを特徴とする請求項1または2に記載の半導体装置の製造方法。
- 半導体基板と、
前記半導体基板上に設けられ、シリコン、酸素、炭素および水素を含む、配線溝が形成された絶縁膜と、
前記配線溝内に設けられた金属配線と、
前記金属配線の上面に選択的に形成されたメタルキャップとを具備してなり、
前記絶縁膜は、その表面を含む第1の領域と、前記第1の領域下の第2の領域とを備えており、前記第1の領域内の炭素濃度は前記表面から深くなるに従って減少し、前記第2の領域内の炭素濃度は、前記第1の領域との界面から一定距離の深さまでは深くなるに従って減少し、前記一定の距離減を越えると深くなるに従って増加し、前記表面における炭素濃度を超えることを特徴とする半導体装置。 - 前記金属配線の金属材料は銅であり、前記キャップメタルの材料はコバルト、ルテニウムもしくはタングステンまたはこれらの金属のうちの二つ以上を含む合金であり、前記絶縁膜はシリコン酸化膜よりも比誘電率が低いことを特徴とする請求項1に記載の半導体装置。
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JP2009068960A JP2010225682A (ja) | 2009-03-19 | 2009-03-19 | 半導体装置およびその製造方法 |
US12/726,604 US8614510B2 (en) | 2009-03-19 | 2010-03-18 | Semiconductor device including a metal wiring with a metal cap |
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JP2009068960A JP2010225682A (ja) | 2009-03-19 | 2009-03-19 | 半導体装置およびその製造方法 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2019531604A (ja) * | 2016-10-02 | 2019-10-31 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | ルテニウムライナーと共に銅のエレクトロマイグレーションを改善するドープされた選択的な金属キャップ |
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Publication number | Priority date | Publication date | Assignee | Title |
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US9059176B2 (en) * | 2012-04-20 | 2015-06-16 | International Business Machines Corporation | Copper interconnect with CVD liner and metallic cap |
WO2014189671A1 (en) * | 2013-05-24 | 2014-11-27 | Applied Materials, Inc. | Cobalt selectivity improvement in selective cobalt process sequence |
US20150206798A1 (en) * | 2014-01-17 | 2015-07-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect Structure And Method of Forming |
KR102321209B1 (ko) | 2014-11-03 | 2021-11-02 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
US11417566B2 (en) * | 2018-07-31 | 2022-08-16 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device structure with interconnect structure and method for forming the same |
Citations (3)
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JP2002353308A (ja) * | 2001-05-28 | 2002-12-06 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2005056945A (ja) * | 2003-08-08 | 2005-03-03 | Hitachi Ltd | 半導体装置の製造方法 |
JP2006198552A (ja) * | 2005-01-21 | 2006-08-03 | Jsr Corp | 表面疎水化方法、ならびに半導体装置およびその製造方法 |
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JP4109531B2 (ja) * | 2002-10-25 | 2008-07-02 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
US7193323B2 (en) * | 2003-11-18 | 2007-03-20 | International Business Machines Corporation | Electroplated CoWP composite structures as copper barrier layers |
JP5060037B2 (ja) | 2005-10-07 | 2012-10-31 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2007157959A (ja) | 2005-12-05 | 2007-06-21 | Sony Corp | 半導体装置の製造方法および半導体装置 |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2002353308A (ja) * | 2001-05-28 | 2002-12-06 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2005056945A (ja) * | 2003-08-08 | 2005-03-03 | Hitachi Ltd | 半導体装置の製造方法 |
JP2006198552A (ja) * | 2005-01-21 | 2006-08-03 | Jsr Corp | 表面疎水化方法、ならびに半導体装置およびその製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019531604A (ja) * | 2016-10-02 | 2019-10-31 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | ルテニウムライナーと共に銅のエレクトロマイグレーションを改善するドープされた選択的な金属キャップ |
JP6998945B2 (ja) | 2016-10-02 | 2022-01-18 | アプライド マテリアルズ インコーポレイテッド | ルテニウムライナーと共に銅のエレクトロマイグレーションを改善するドープされた選択的な金属キャップ |
US11373903B2 (en) | 2016-10-02 | 2022-06-28 | Applied Materials, Inc. | Doped selective metal caps to improve copper electromigration with ruthenium liner |
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US8614510B2 (en) | 2013-12-24 |
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