JP4619747B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4619747B2 JP4619747B2 JP2004318375A JP2004318375A JP4619747B2 JP 4619747 B2 JP4619747 B2 JP 4619747B2 JP 2004318375 A JP2004318375 A JP 2004318375A JP 2004318375 A JP2004318375 A JP 2004318375A JP 4619747 B2 JP4619747 B2 JP 4619747B2
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- interlayer insulating
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- insulating film
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- carbon
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- 239000004065 semiconductor Substances 0.000 title claims description 60
- 238000004519 manufacturing process Methods 0.000 title claims description 51
- 239000011229 interlayer Substances 0.000 claims description 176
- 238000000034 method Methods 0.000 claims description 138
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 125
- 229910052799 carbon Inorganic materials 0.000 claims description 125
- 230000001681 protective effect Effects 0.000 claims description 124
- 238000009792 diffusion process Methods 0.000 claims description 37
- 230000002265 prevention Effects 0.000 claims description 30
- 239000010410 layer Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 8
- 239000010949 copper Substances 0.000 description 47
- 239000000463 material Substances 0.000 description 43
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 34
- 229910052802 copper Inorganic materials 0.000 description 34
- 230000002209 hydrophobic effect Effects 0.000 description 24
- 229910052751 metal Inorganic materials 0.000 description 21
- 239000002184 metal Substances 0.000 description 21
- 230000004888 barrier function Effects 0.000 description 15
- 238000005530 etching Methods 0.000 description 15
- 239000007788 liquid Substances 0.000 description 15
- 238000006243 chemical reaction Methods 0.000 description 13
- 238000011049 filling Methods 0.000 description 13
- 238000007747 plating Methods 0.000 description 12
- 230000003247 decreasing effect Effects 0.000 description 11
- 230000007797 corrosion Effects 0.000 description 7
- 238000005260 corrosion Methods 0.000 description 7
- 230000035515 penetration Effects 0.000 description 7
- 238000000137 annealing Methods 0.000 description 6
- 238000003795 desorption Methods 0.000 description 6
- 238000009826 distribution Methods 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 6
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000004380 ashing Methods 0.000 description 5
- 238000011161 development Methods 0.000 description 5
- 230000008595 infiltration Effects 0.000 description 5
- 238000001764 infiltration Methods 0.000 description 5
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 5
- 238000005498 polishing Methods 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 238000013508 migration Methods 0.000 description 4
- 230000005012 migration Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- RTZKZFJDLAIYFH-UHFFFAOYSA-N Diethyl ether Chemical compound CCOCC RTZKZFJDLAIYFH-UHFFFAOYSA-N 0.000 description 2
- 229910018540 Si C Inorganic materials 0.000 description 2
- 229910008051 Si-OH Inorganic materials 0.000 description 2
- 229910006358 Si—OH Inorganic materials 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- WHEATZOONURNGF-UHFFFAOYSA-N benzocyclobutadiene Chemical compound C1=CC=C2C=CC2=C1 WHEATZOONURNGF-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 1
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229920000412 polyarylene Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H01L21/02115—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
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- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
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- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
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- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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Description
半導体基板の上方に、炭素を含む層間絶縁膜を形成する第1のステップと、
前記層間絶縁膜の表面付近における炭素濃度を低下させる処理を行う第2のステップと、
表面付近における炭素濃度が低下した前記層間絶縁膜上に保護膜を形成する第3のステップと、
前記保護膜の表面から前記層間絶縁膜の底面まで貫通するように、前記層間絶縁膜及び前記保護膜のうち所望の領域を選択的に除去することにより、溝を形成する第4のステップと、
前記溝内部の表面から前記層間絶縁膜と前記保護膜との界面に、炭素を供給する第5のステップと、
前記溝に導電性材料を埋め込むことにより、導電層を形成する第6のステップと
を備えることを特徴とする。
半導体基板の上方に、炭素を含む層間絶縁膜を形成する第1のステップと、
前記層間絶縁膜の表面付近における炭素濃度を低下させる処理を行う第2のステップと、
表面付近における炭素濃度が低下した前記層間絶縁膜上に保護膜を形成する第3のステップと、
前記保護膜の表面から前記層間絶縁膜の底面まで貫通するように、前記層間絶縁膜及び前記保護膜のうち所望の領域を選択的に除去することにより、溝を形成する第4のステップと、
前記溝に導電性材料を埋め込むことにより、導電層を形成する第4のステップと、
前記保護膜を介して、前記層間絶縁膜と前記保護膜との界面に、炭素を供給する第5のステップと
を備えることを特徴とする。
半導体基板の上方に、炭素を含む層間絶縁膜を形成する第1のステップと、
前記層間絶縁膜の表面付近における炭素濃度を低下させる処理を行う第2のステップと、
表面付近における炭素濃度が低下した前記層間絶縁膜上に保護膜を形成する第3のステップと、
前記保護膜の表面から前記層間絶縁膜の底面まで貫通するように、前記層間絶縁膜及び前記保護膜のうち所望の領域を選択的に除去することにより、溝を形成する第4のステップと、
前記溝に導電性材料を埋め込むことにより、導電層を形成する際、露出する前記保護膜を除去する第5のステップと、
前記層間絶縁膜の表面に、炭素を供給する第6のステップと
を備えることを特徴とする。
図1〜図10に、本発明の第1の実施の形態による半導体装置の製造方法を示す。まず図1に示すように、図示しない半導体基板の上方に層間絶縁膜10が形成され、当該層間絶縁膜10上に形成された保護膜20と、これら層間絶縁膜10及び保護膜20に形成された配線30との上面に、拡散防止膜40を形成する。
図14〜図16に、本発明の第2の実施の形態による半導体装置の製造方法を示す。なお、ビアホール80及び配線溝100を形成した後、下層の配線30の上面の一部を露出するまでの工程は、第1の実施の形態の図1〜図7における工程と同一であるため、説明を省略する。
図17〜図19に、本発明の第3の実施の形態による半導体装置の製造方法を示す。なお、ビアホール80及び配線溝100を形成した後、下層の配線30の上面の一部を露出するまでの工程は、第1の実施の形態の図1〜図7における工程と同一であるため、説明を省略する。
図20〜図22に、本発明の第4の実施の形態による半導体装置の製造方法を示す。なお、ビアホール80及び配線溝100を形成した後、下層の配線30の上面の一部を露出するまでの工程は、第1の実施の形態の図1〜図7における工程と同一であるため、説明を省略する。
図23〜図32に、本発明の第5の実施の形態による半導体装置の製造方法を示す。まず図23に示すように、図示しない半導体基板の上方に層間絶縁膜210が形成され、当該層間絶縁膜210上に形成された保護膜220と、これら層間絶縁膜210及び保護膜220に形成された配線230との上面に、拡散防止膜240を形成する。この拡散防止膜240は、配線230から例えば銅(Cu)が拡散することを防止すると共に、エッチングストッパとしての役割を果たす。
図33〜図39に、本発明の第6の実施の形態による半導体装置の製造方法を示す。まず図33に示すように、図示しない半導体素子が形成された半導体基板上に、層間絶縁膜400と、例えばタングステンプラグなどのプラグ410を形成する。
なお上述の実施の形態は一例であって、本発明を限定するものではない。例えば、プラグ110、330及び配線120、340、460の材料として、銅(Cu)を使用したが、例えばアルミニウム(Al)など、他の種々の導電性材料を、層間絶縁膜50、250、270、420及び/又は保護膜60、260、280、430に形成された、ビアホール80、300及び/又は配線溝100、320、450からなる溝に埋め込むことにより、プラグ110、330及び/又は配線120、340、460からなる導電層を形成しても良い。
20、60、220、260、280、430 保護膜
30、120、230、340、460 配線
40、130、240、350、470 拡散防止膜
50A、250A、270A、420A 炭素濃度低下領域
70、90、290、310、440 レジスト材
80、300 ビアホール
100、320、450 配線溝
110、330 プラグ
Claims (4)
- 半導体基板の上方に、炭素を含む層間絶縁膜を形成する第1のステップと、
前記層間絶縁膜の表面付近における炭素濃度を低下させる処理を行う第2のステップと、
表面付近における炭素濃度が低下した前記層間絶縁膜上に保護膜を形成する第3のステップと、
前記保護膜の表面から前記層間絶縁膜の底面まで貫通するように、前記層間絶縁膜及び前記保護膜のうち所望の領域を選択的に除去することにより、溝を形成する第4のステップと、
前記溝内部の表面から前記層間絶縁膜と前記保護膜との界面に、炭素を供給する第5のステップと、
前記溝に導電性材料を埋め込むことにより、導電層を形成する第6のステップと
を備えることを特徴とする半導体装置の製造方法。 - 半導体基板の上方に、炭素を含む層間絶縁膜を形成する第1のステップと、
前記層間絶縁膜の表面付近における炭素濃度を低下させる処理を行う第2のステップと、
表面付近における炭素濃度が低下した前記層間絶縁膜上に保護膜を形成する第3のステップと、
前記保護膜の表面から前記層間絶縁膜の底面まで貫通するように、前記層間絶縁膜及び前記保護膜のうち所望の領域を選択的に除去することにより、溝を形成する第4のステップと、
前記溝に導電性材料を埋め込むことにより、導電層を形成する第5のステップと、
前記保護膜を介して、前記層間絶縁膜と前記保護膜との界面に、炭素を供給する第6のステップと
を備えることを特徴とする半導体装置の製造方法。 - 前記導電層を形成した後、前記保護膜及び前記導電層の上面に、前記導電層から導電性材料が拡散することを防止するための拡散防止膜を形成するステップを前記第5のステップと前記第6のステップとの間にさらに備え、
前記炭素を供給する前記第6のステップでは、前記拡散防止膜及び前記保護膜を介して、前記層間絶縁膜と前記保護膜の界面に、炭素を供給することを特徴とする請求項2記載の半導体装置の製造方法。 - 半導体基板の上方に、炭素を含む層間絶縁膜を形成する第1のステップと、
前記層間絶縁膜の表面付近における炭素濃度を低下させる処理を行う第2のステップと、
表面付近における炭素濃度が低下した前記層間絶縁膜上に保護膜を形成する第3のステップと、
前記保護膜の表面から前記層間絶縁膜の底面まで貫通するように、前記層間絶縁膜及び前記保護膜のうち所望の領域を選択的に除去することにより、溝を形成する第4のステップと、
前記溝に導電性材料を埋め込むことにより、導電層を形成する際、露出する前記保護膜を除去する第5のステップと、
前記層間絶縁膜の表面に、炭素を供給する第6のステップと
を備えることを特徴とする半導体装置の製造方法。
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JP5548332B2 (ja) * | 2006-08-24 | 2014-07-16 | 富士通セミコンダクター株式会社 | 半導体デバイスの製造方法 |
US8017522B2 (en) * | 2007-01-24 | 2011-09-13 | International Business Machines Corporation | Mechanically robust metal/low-κ interconnects |
US20090239363A1 (en) * | 2008-03-24 | 2009-09-24 | Honeywell International, Inc. | Methods for forming doped regions in semiconductor substrates using non-contact printing processes and dopant-comprising inks for forming such doped regions using non-contact printing processes |
US8053867B2 (en) * | 2008-08-20 | 2011-11-08 | Honeywell International Inc. | Phosphorous-comprising dopants and methods for forming phosphorous-doped regions in semiconductor substrates using phosphorous-comprising dopants |
US7951696B2 (en) | 2008-09-30 | 2011-05-31 | Honeywell International Inc. | Methods for simultaneously forming N-type and P-type doped regions using non-contact printing processes |
US8518170B2 (en) * | 2008-12-29 | 2013-08-27 | Honeywell International Inc. | Boron-comprising inks for forming boron-doped regions in semiconductor substrates using non-contact printing processes and methods for fabricating such boron-comprising inks |
US8324089B2 (en) | 2009-07-23 | 2012-12-04 | Honeywell International Inc. | Compositions for forming doped regions in semiconductor substrates, methods for fabricating such compositions, and methods for forming doped regions using such compositions |
US8629294B2 (en) | 2011-08-25 | 2014-01-14 | Honeywell International Inc. | Borate esters, boron-comprising dopants, and methods of fabricating boron-comprising dopants |
US9165822B2 (en) * | 2013-03-11 | 2015-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and methods of forming same |
US9460997B2 (en) * | 2013-12-31 | 2016-10-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structure for semiconductor devices |
US9859154B2 (en) * | 2016-03-11 | 2018-01-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and formation method of interconnect structure of semiconductor device |
US11978668B2 (en) | 2021-09-09 | 2024-05-07 | Samsung Electronics Co., Ltd. | Integrated circuit devices including a via and methods of forming the same |
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