JP2010205849A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2010205849A JP2010205849A JP2009048440A JP2009048440A JP2010205849A JP 2010205849 A JP2010205849 A JP 2010205849A JP 2009048440 A JP2009048440 A JP 2009048440A JP 2009048440 A JP2009048440 A JP 2009048440A JP 2010205849 A JP2010205849 A JP 2010205849A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- substrate
- layer
- shield layer
- antenna
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
- H10W44/241—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for passive devices or passive elements
- H10W44/248—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for passive devices or passive elements for antennas
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009048440A JP2010205849A (ja) | 2009-03-02 | 2009-03-02 | 半導体装置 |
| US12/714,768 US20100219514A1 (en) | 2009-03-02 | 2010-03-01 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009048440A JP2010205849A (ja) | 2009-03-02 | 2009-03-02 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010205849A true JP2010205849A (ja) | 2010-09-16 |
| JP2010205849A5 JP2010205849A5 (https=) | 2011-07-28 |
Family
ID=42666671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009048440A Abandoned JP2010205849A (ja) | 2009-03-02 | 2009-03-02 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20100219514A1 (https=) |
| JP (1) | JP2010205849A (https=) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012070253A (ja) * | 2010-09-24 | 2012-04-05 | Toshiba Corp | 無線装置 |
| JP2013542596A (ja) * | 2010-09-24 | 2013-11-21 | アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド | 補強シリコン貫通ビアを備える半導体チップ |
| JP2019110293A (ja) * | 2017-12-15 | 2019-07-04 | 電子商取引安全技術研究組合 | 半導体装置 |
| CN112448152A (zh) * | 2019-08-30 | 2021-03-05 | 庆鼎精密电子(淮安)有限公司 | 集成化天线叠构及其制作方法 |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI497679B (zh) * | 2009-11-27 | 2015-08-21 | 日月光半導體製造股份有限公司 | 半導體封裝件及其製造方法 |
| US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
| TWI411075B (zh) | 2010-03-22 | 2013-10-01 | 日月光半導體製造股份有限公司 | 半導體封裝件及其製造方法 |
| US8941222B2 (en) | 2010-11-11 | 2015-01-27 | Advanced Semiconductor Engineering Inc. | Wafer level semiconductor package and manufacturing methods thereof |
| US9406658B2 (en) | 2010-12-17 | 2016-08-02 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
| ITMI20111416A1 (it) | 2011-07-28 | 2013-01-29 | St Microelectronics Srl | Circuito integrato dotato di almeno una antenna integrata |
| TW201415600A (zh) * | 2012-10-02 | 2014-04-16 | 鈺橋半導體股份有限公司 | 具有內嵌元件、內建定位件、及電磁屏障之線路板 |
| US9721948B1 (en) * | 2016-02-02 | 2017-08-01 | Globalfoundries Inc. | Switch improvement using layout optimization |
| EP4163970A1 (en) * | 2016-07-01 | 2023-04-12 | INTEL Corporation | Semiconductor packages with antennas |
| US12327804B2 (en) * | 2022-05-13 | 2025-06-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and manufacturing method thereof |
| US20240096817A1 (en) * | 2022-09-16 | 2024-03-21 | Qualcomm Incorporated | On-chip hybrid electromagnetic interference (emi) shielding with thermal mitigation |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6646328B2 (en) * | 2002-01-11 | 2003-11-11 | Taiwan Semiconductor Manufacturing Co. Ltd. | Chip antenna with a shielding layer |
| JP4141881B2 (ja) * | 2003-04-04 | 2008-08-27 | シャープ株式会社 | 集積回路 |
-
2009
- 2009-03-02 JP JP2009048440A patent/JP2010205849A/ja not_active Abandoned
-
2010
- 2010-03-01 US US12/714,768 patent/US20100219514A1/en not_active Abandoned
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012070253A (ja) * | 2010-09-24 | 2012-04-05 | Toshiba Corp | 無線装置 |
| JP2013542596A (ja) * | 2010-09-24 | 2013-11-21 | アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド | 補強シリコン貫通ビアを備える半導体チップ |
| KR101540415B1 (ko) * | 2010-09-24 | 2015-08-05 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | 보강 실리콘 관통 비아를 구비하는 반도체 칩 |
| JP2019110293A (ja) * | 2017-12-15 | 2019-07-04 | 電子商取引安全技術研究組合 | 半導体装置 |
| JP2023076693A (ja) * | 2017-12-15 | 2023-06-01 | 株式会社Scu | 半導体装置 |
| JP7290846B2 (ja) | 2017-12-15 | 2023-06-14 | 株式会社Scu | 半導体装置 |
| JP7495551B2 (ja) | 2017-12-15 | 2024-06-04 | 株式会社Scu | 半導体装置 |
| CN112448152A (zh) * | 2019-08-30 | 2021-03-05 | 庆鼎精密电子(淮安)有限公司 | 集成化天线叠构及其制作方法 |
| CN112448152B (zh) * | 2019-08-30 | 2022-10-21 | 庆鼎精密电子(淮安)有限公司 | 集成化天线叠构及其制作方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20100219514A1 (en) | 2010-09-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110602 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110603 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20110603 |
|
| A762 | Written abandonment of application |
Free format text: JAPANESE INTERMEDIATE CODE: A762 Effective date: 20120704 |