JP2010176839A5 - - Google Patents

Download PDF

Info

Publication number
JP2010176839A5
JP2010176839A5 JP2010076273A JP2010076273A JP2010176839A5 JP 2010176839 A5 JP2010176839 A5 JP 2010176839A5 JP 2010076273 A JP2010076273 A JP 2010076273A JP 2010076273 A JP2010076273 A JP 2010076273A JP 2010176839 A5 JP2010176839 A5 JP 2010176839A5
Authority
JP
Japan
Prior art keywords
output
latches
system clock
data
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2010076273A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010176839A (ja
JP5266271B2 (ja
Filing date
Publication date
Priority claimed from CA2233789A external-priority patent/CA2233789C/en
Application filed filed Critical
Publication of JP2010176839A publication Critical patent/JP2010176839A/ja
Publication of JP2010176839A5 publication Critical patent/JP2010176839A5/ja
Application granted granted Critical
Publication of JP5266271B2 publication Critical patent/JP5266271B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2010076273A 1998-04-01 2010-03-29 半導体メモリ非同期式パイプライン Expired - Fee Related JP5266271B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
CA2233789A CA2233789C (en) 1998-04-01 1998-04-01 Semiconductor memory asynchronous pipeline
CA2,233,789 1998-04-01
US09/129,878 1998-08-06
US09/129,878 US6539454B2 (en) 1998-04-01 1998-08-06 Semiconductor memory asynchronous pipeline

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2000541688A Division JP2002510118A (ja) 1998-04-01 1999-04-01 半導体メモリ非同期式パイプライン

Publications (3)

Publication Number Publication Date
JP2010176839A JP2010176839A (ja) 2010-08-12
JP2010176839A5 true JP2010176839A5 (enExample) 2011-10-06
JP5266271B2 JP5266271B2 (ja) 2013-08-21

Family

ID=4162280

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2010076273A Expired - Fee Related JP5266271B2 (ja) 1998-04-01 2010-03-29 半導体メモリ非同期式パイプライン
JP2011147610A Expired - Fee Related JP5580254B2 (ja) 1998-04-01 2011-07-01 半導体メモリ非同期式パイプライン

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2011147610A Expired - Fee Related JP5580254B2 (ja) 1998-04-01 2011-07-01 半導体メモリ非同期式パイプライン

Country Status (4)

Country Link
US (1) US6539454B2 (enExample)
JP (2) JP5266271B2 (enExample)
KR (1) KR100623801B1 (enExample)
CA (2) CA2805213A1 (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1154111C (zh) * 1998-04-01 2004-06-16 睦塞德技术公司 异步流水线半导体存储器
US6415374B1 (en) * 2000-03-16 2002-07-02 Mosel Vitelic, Inc. System and method for supporting sequential burst counts in double data rate (DDR) synchronous dynamic random access memories (SDRAM)
EP2056301B1 (en) * 2000-07-07 2011-11-30 Mosaid Technologies Incorporated A high speed dram architecture with uniform access latency
US6788593B2 (en) * 2001-02-28 2004-09-07 Rambus, Inc. Asynchronous, high-bandwidth memory component using calibrated timing elements
US6675272B2 (en) * 2001-04-24 2004-01-06 Rambus Inc. Method and apparatus for coordinating memory operations among diversely-located memory components
US8391039B2 (en) * 2001-04-24 2013-03-05 Rambus Inc. Memory module with termination component
DE10203893B4 (de) * 2002-01-31 2004-01-15 Infineon Technologies Ag DDR-Speicher und Speicherverfahren
US7484079B2 (en) * 2002-10-31 2009-01-27 Hewlett-Packard Development Company, L.P. Pipeline stage initialization via task frame accessed by a memory pointer propagated among the pipeline stages
KR100496817B1 (ko) * 2002-12-30 2005-06-23 주식회사 하이닉스반도체 데이터 정렬 시간을 최소화할 수 있는 반도체 기억 장치
KR100521759B1 (ko) * 2003-03-27 2005-10-17 학교법인 인하학원 모서리 감지 종료 회로 및 이를 이용한 고속의 비동기파이프라인 회로
US6963517B2 (en) * 2003-08-11 2005-11-08 Chao-Wu Chen Parallel asynchronous propagation pipeline structure to access multiple memory arrays
US7301831B2 (en) 2004-09-15 2007-11-27 Rambus Inc. Memory systems with variable delays for write data signals
KR100753081B1 (ko) * 2005-09-29 2007-08-31 주식회사 하이닉스반도체 내부 어드레스 생성장치를 구비하는 반도체메모리소자
US7515482B2 (en) * 2005-09-29 2009-04-07 Hynix Semiconductor Inc. Pipe latch device of semiconductor memory device
US7391656B2 (en) * 2006-07-25 2008-06-24 Etron Technology, Inc. Self-feedback control pipeline architecture for memory read path applications
US8873264B1 (en) 2012-08-24 2014-10-28 Cypress Semiconductor Corporation Data forwarding circuits and methods for memory devices with write latency
US8527802B1 (en) * 2012-08-24 2013-09-03 Cypress Semiconductor Corporation Memory device data latency circuits and methods
US8933739B1 (en) 2013-07-05 2015-01-13 Kabushiki Kaisha Toshiba Semiconductor integrated circuit
KR102101390B1 (ko) * 2013-10-08 2020-04-17 에스케이하이닉스 주식회사 반도체 장치 및 이를 포함하는 반도체 시스템
US10699053B1 (en) * 2018-01-17 2020-06-30 Xilinx, Inc. Timing optimization of memory blocks in a programmable IC
BR112023012414A2 (pt) * 2021-04-28 2023-11-07 Yangtze Memory Tech Co Ltd Circuito, sistema, dispositivo de memória e método para operar um dispositivo de memória composto por um armazenamento temporário de página
US12189460B2 (en) * 2021-07-06 2025-01-07 UPBEAT TECHNOLOGY Co., Ltd Error detection and correction method and circuit

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05144269A (ja) * 1991-11-19 1993-06-11 Fujitsu Ltd 半導体記憶装置
DE69331061T2 (de) * 1992-08-10 2002-06-06 Monolithic System Tech Inc Fehlertolerantes hierarchisiertes Bussystem
JPH06187787A (ja) * 1992-12-17 1994-07-08 Hitachi Ltd 半導体記憶装置とそのパイプライン動作制御方法
US5352945A (en) * 1993-03-18 1994-10-04 Micron Semiconductor, Inc. Voltage compensating delay element
JPH06290582A (ja) * 1993-04-02 1994-10-18 Nec Corp 半導体記憶装置
US5402388A (en) 1993-12-16 1995-03-28 Mosaid Technologies Incorporated Variable latency scheme for synchronous memory
JP3177094B2 (ja) * 1994-05-31 2001-06-18 富士通株式会社 半導体記憶装置
JPH0831180A (ja) * 1994-07-08 1996-02-02 Hitachi Ltd 半導体記憶装置
JP3013714B2 (ja) * 1994-09-28 2000-02-28 日本電気株式会社 半導体記憶装置
JP2616567B2 (ja) 1994-09-28 1997-06-04 日本電気株式会社 半導体記憶装置
US5713005A (en) 1995-02-10 1998-01-27 Townsend And Townsend And Crew Llp Method and apparatus for pipelining data in an integrated circuit
US5544124A (en) 1995-03-13 1996-08-06 Micron Technology, Inc. Optimization circuitry and control for a synchronous memory device with programmable latency period
JPH08263985A (ja) 1995-03-24 1996-10-11 Nec Corp 半導体記憶装置
US5655105A (en) 1995-06-30 1997-08-05 Micron Technology, Inc. Method and apparatus for multiple latency synchronous pipelined dynamic random access memory
JPH0963262A (ja) * 1995-08-17 1997-03-07 Fujitsu Ltd シンクロナスdram
KR0164395B1 (ko) * 1995-09-11 1999-02-18 김광호 반도체 메모리 장치와 그 리이드 및 라이트 방법
JP2817679B2 (ja) 1995-09-20 1998-10-30 日本電気株式会社 半導体メモリ
EP0867068A1 (en) * 1995-12-15 1998-09-30 Unisys Corporation Delay circuit and memory using the same
US5784705A (en) * 1996-07-15 1998-07-21 Mosys, Incorporated Method and structure for performing pipeline burst accesses in a semiconductor memory
JP4070255B2 (ja) * 1996-08-13 2008-04-02 富士通株式会社 半導体集積回路
JPH10188556A (ja) * 1996-12-20 1998-07-21 Fujitsu Ltd 半導体記憶装置
JP3504104B2 (ja) * 1997-04-03 2004-03-08 富士通株式会社 シンクロナスdram
JPH11176158A (ja) * 1997-12-10 1999-07-02 Fujitsu Ltd ラッチ回路、データ出力回路及びこれを有する半導体装置

Similar Documents

Publication Publication Date Title
JP2010176839A5 (enExample)
CN107919153B (zh) 存储装置及其执行的时钟同步方法
EP4290521A3 (en) Enhanced data clock operations in memory
TWI566256B (zh) 記憶體系統及其記憶體實體介面電路
JP2011003250A5 (enExample)
TWI264004B (en) Semiconductor integrated circuit device
JP2012147426A5 (ja) デジタル位相周波数検出器
WO2015103290A3 (en) Multi-level data pattern generation for i/o testing of multilevel interfaces
JP2016522499A5 (enExample)
TWI271744B (en) Semiconductor memory device having advanced data strobe circuit
CN104810047A (zh) 半导体器件
KR20140026046A (ko) 데이터입력회로
ATE470936T1 (de) Digitaler datenpuffer
GB2473914B (en) Buffering in media and pipelined processing components
WO2016167933A3 (en) Control circuits for generating output enable signals, and related systems and methods
JP2017535800A5 (enExample)
US10044496B2 (en) Bandwidth amplification using pre-clocking
TW200703017A (en) Method and apparatus for synchronizing multimedia data stream
CN108962305B (zh) 数据对齐电路和包括其的半导体器件
TWI516946B (zh) 用來進行去偏斜控制之方法與裝置
WO2018072439A1 (zh) 一种测试信号产生方法及装置、计算机存储介质
JP2013527541A5 (enExample)
US9466396B2 (en) Semiconductor devices and semiconductor systems including the same
US10446240B2 (en) Semiconductor device and method of operating the same
JP2010283816A5 (enExample)