JP2010153498A5 - - Google Patents

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Publication number
JP2010153498A5
JP2010153498A5 JP2008328365A JP2008328365A JP2010153498A5 JP 2010153498 A5 JP2010153498 A5 JP 2010153498A5 JP 2008328365 A JP2008328365 A JP 2008328365A JP 2008328365 A JP2008328365 A JP 2008328365A JP 2010153498 A5 JP2010153498 A5 JP 2010153498A5
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JP
Japan
Prior art keywords
resin
electronic component
support
adhesive layer
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2008328365A
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English (en)
Japanese (ja)
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JP5147677B2 (ja
JP2010153498A (ja
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Priority to JP2008328365A priority Critical patent/JP5147677B2/ja
Priority claimed from JP2008328365A external-priority patent/JP5147677B2/ja
Priority to US12/644,407 priority patent/US8399977B2/en
Publication of JP2010153498A publication Critical patent/JP2010153498A/ja
Publication of JP2010153498A5 publication Critical patent/JP2010153498A5/ja
Application granted granted Critical
Publication of JP5147677B2 publication Critical patent/JP5147677B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008328365A 2008-12-24 2008-12-24 樹脂封止パッケージの製造方法 Active JP5147677B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008328365A JP5147677B2 (ja) 2008-12-24 2008-12-24 樹脂封止パッケージの製造方法
US12/644,407 US8399977B2 (en) 2008-12-24 2009-12-22 Resin-sealed package and method of producing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008328365A JP5147677B2 (ja) 2008-12-24 2008-12-24 樹脂封止パッケージの製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012179403A Division JP5456113B2 (ja) 2012-08-13 2012-08-13 樹脂封止パッケージ

Publications (3)

Publication Number Publication Date
JP2010153498A JP2010153498A (ja) 2010-07-08
JP2010153498A5 true JP2010153498A5 (enExample) 2011-11-17
JP5147677B2 JP5147677B2 (ja) 2013-02-20

Family

ID=42264825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008328365A Active JP5147677B2 (ja) 2008-12-24 2008-12-24 樹脂封止パッケージの製造方法

Country Status (2)

Country Link
US (1) US8399977B2 (enExample)
JP (1) JP5147677B2 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5734624B2 (ja) * 2010-11-12 2015-06-17 新光電気工業株式会社 半導体パッケージの製造方法
JP2013098433A (ja) * 2011-11-02 2013-05-20 Hitachi Ltd プリント基板の製造方法及びその製造方法によって製造されたプリント基板
US9595651B2 (en) 2012-12-21 2017-03-14 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing same
CN104603932A (zh) * 2012-12-21 2015-05-06 松下知识产权经营株式会社 电子部件封装件及其制造方法
US9825209B2 (en) 2012-12-21 2017-11-21 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing the same
US9449944B2 (en) 2012-12-21 2016-09-20 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing same
WO2014097644A1 (ja) * 2012-12-21 2014-06-26 パナソニック株式会社 電子部品パッケージおよびその製造方法
US9576930B2 (en) * 2013-11-08 2017-02-21 Taiwan Semiconductor Manufacturing Co., Ltd. Thermally conductive structure for heat dissipation in semiconductor packages
US20150206855A1 (en) * 2014-01-22 2015-07-23 Mediatek Inc. Semiconductor package
JP6354285B2 (ja) * 2014-04-22 2018-07-11 オムロン株式会社 電子部品を埋設した樹脂構造体およびその製造方法
US9786631B2 (en) * 2014-11-26 2017-10-10 Taiwan Semiconductor Manufacturing Company, Ltd. Device package with reduced thickness and method for forming same
JP6610498B2 (ja) * 2016-10-21 2019-11-27 株式会社村田製作所 複合型電子部品の製造方法
EP3557608A1 (en) * 2018-04-19 2019-10-23 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Packaged integrated circuit with interposing functionality and method for manufacturing such a packaged integrated circuit
TWI736859B (zh) * 2019-03-18 2021-08-21 矽品精密工業股份有限公司 電子封裝件及其製法
KR102702093B1 (ko) * 2019-11-27 2024-09-04 삼성전자주식회사 반도체 패키지
US12315776B2 (en) * 2021-11-08 2025-05-27 Analog Devices, Inc. Integrated device package with an integrated heat sink

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US6586836B1 (en) * 2000-03-01 2003-07-01 Intel Corporation Process for forming microelectronic packages and intermediate structures formed therewith
JP2001352021A (ja) * 2000-06-07 2001-12-21 Sony Corp 半導体パッケージ、半導体パッケージの実装構造及び半導体パッケージの製造方法
CN100539106C (zh) 2000-09-25 2009-09-09 揖斐电株式会社 半导体元件及其制造方法、多层印刷布线板及其制造方法
US6407334B1 (en) * 2000-11-30 2002-06-18 International Business Machines Corporation I/C chip assembly
JP4270769B2 (ja) * 2000-12-15 2009-06-03 イビデン株式会社 多層プリント配線板の製造方法
JP5075309B2 (ja) * 2001-03-16 2012-11-21 日本発條株式会社 導電性接触子用支持体
US6965160B2 (en) * 2002-08-15 2005-11-15 Micron Technology, Inc. Semiconductor dice packages employing at least one redistribution layer
US7339276B2 (en) * 2002-11-04 2008-03-04 Intel Corporation Underfilling process in a molded matrix array package using flow front modifying solder resist
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TWI239080B (en) * 2002-12-31 2005-09-01 Advanced Semiconductor Eng Semiconductor chip package and method for the same
US7265436B2 (en) * 2004-02-17 2007-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Non-repeated and non-uniform width seal ring structure
US7193318B2 (en) * 2004-08-18 2007-03-20 International Business Machines Corporation Multiple power density chip structure
JP4526983B2 (ja) * 2005-03-15 2010-08-18 新光電気工業株式会社 配線基板の製造方法
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US20100109169A1 (en) * 2008-04-29 2010-05-06 United Test And Assembly Center Ltd Semiconductor package and method of making the same
TW200947650A (en) * 2008-05-14 2009-11-16 Harvatek Corp Semiconductor chip package structure for achieving negative face electrical connection without using a wire-bonding process
JP5210839B2 (ja) * 2008-12-10 2013-06-12 新光電気工業株式会社 配線基板及びその製造方法

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