JP2009231805A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2009231805A
JP2009231805A JP2008332756A JP2008332756A JP2009231805A JP 2009231805 A JP2009231805 A JP 2009231805A JP 2008332756 A JP2008332756 A JP 2008332756A JP 2008332756 A JP2008332756 A JP 2008332756A JP 2009231805 A JP2009231805 A JP 2009231805A
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JP
Japan
Prior art keywords
source
lead
semiconductor device
gate
pad
Prior art date
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Pending
Application number
JP2008332756A
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English (en)
Japanese (ja)
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JP2009231805A5 (https=
Inventor
Kuniharu Muto
邦治 武藤
Tadatoshi Danno
忠敏 団野
Hiroyuki Takahashi
浩幸 高橋
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Renesas Technology Corp
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Renesas Technology Corp
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Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2008332756A priority Critical patent/JP2009231805A/ja
Priority to TW098104704A priority patent/TW200947651A/zh
Priority to US12/393,031 priority patent/US20090218676A1/en
Priority to CN200910126115A priority patent/CN101692444A/zh
Priority to KR1020090016884A priority patent/KR20090093880A/ko
Publication of JP2009231805A publication Critical patent/JP2009231805A/ja
Publication of JP2009231805A5 publication Critical patent/JP2009231805A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/417—Bonding materials between chips and die pads
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    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/466—Tape carriers or flat leads
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    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
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    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
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    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
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    • H10W72/07631—Techniques
    • H10W72/07632—Compression bonding, e.g. thermocompression bonding
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    • H10W72/07651—Connecting or disconnecting of strap connectors characterised by changes in properties of the strap connectors during connecting
    • H10W72/07653—Connecting or disconnecting of strap connectors characterised by changes in properties of the strap connectors during connecting changes in shapes
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    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
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    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
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    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
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    • H10W72/541—Dispositions of bond wires
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    • H10W72/5475—Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
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    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
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    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
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    • H10W72/874—On different surfaces
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    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
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    • H10W90/763—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between laterally-adjacent chips
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    • H10W90/766—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Die Bonding (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Wire Bonding (AREA)
JP2008332756A 2008-02-29 2008-12-26 半導体装置 Pending JP2009231805A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2008332756A JP2009231805A (ja) 2008-02-29 2008-12-26 半導体装置
TW098104704A TW200947651A (en) 2008-02-29 2009-02-13 Semiconductor device
US12/393,031 US20090218676A1 (en) 2008-02-29 2009-02-25 Semiconductor device
CN200910126115A CN101692444A (zh) 2008-02-29 2009-02-27 半导体器件
KR1020090016884A KR20090093880A (ko) 2008-02-29 2009-02-27 반도체 장치

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008049628 2008-02-29
JP2008332756A JP2009231805A (ja) 2008-02-29 2008-12-26 半導体装置

Publications (2)

Publication Number Publication Date
JP2009231805A true JP2009231805A (ja) 2009-10-08
JP2009231805A5 JP2009231805A5 (https=) 2012-04-19

Family

ID=41012538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008332756A Pending JP2009231805A (ja) 2008-02-29 2008-12-26 半導体装置

Country Status (5)

Country Link
US (1) US20090218676A1 (https=)
JP (1) JP2009231805A (https=)
KR (1) KR20090093880A (https=)
CN (1) CN101692444A (https=)
TW (1) TW200947651A (https=)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013046439A1 (ja) * 2011-09-30 2013-04-04 ルネサスエレクトロニクス株式会社 半導体装置
JP2014187080A (ja) * 2013-03-22 2014-10-02 Panasonic Corp 半導体素子、半導体装置及び複合モジュール
JP2015216407A (ja) * 2015-08-31 2015-12-03 三菱電機株式会社 半導体装置
JPWO2016104088A1 (ja) * 2014-12-24 2017-04-27 日本精工株式会社 パワー半導体モジュール及びこれを用いた電動パワーステアリング装置
JP2017191895A (ja) * 2016-04-14 2017-10-19 ローム株式会社 半導体装置および半導体装置の製造方法
JP2018073970A (ja) * 2016-10-28 2018-05-10 ルネサスエレクトロニクス株式会社 半導体装置
KR20180120598A (ko) * 2017-04-27 2018-11-06 르네사스 일렉트로닉스 가부시키가이샤 반도체 장치 및 그 제조 방법
JP2020155660A (ja) * 2019-03-22 2020-09-24 富士電機株式会社 半導体装置および半導体装置の検査方法
JP2022074290A (ja) * 2020-11-04 2022-05-18 ローム株式会社 半導体装置
EP4099382A2 (en) 2021-06-02 2022-12-07 Renesas Electronics Corporation Semiconductor device
JP2023123879A (ja) * 2019-05-13 2023-09-05 ローム株式会社 半導体装置
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