JP2009105209A - 電子装置及びその製造方法 - Google Patents
電子装置及びその製造方法 Download PDFInfo
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
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- H01L2224/16111—Disposition the bump connector being disposed in a recess of the surface
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
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- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
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- H05K2201/10621—Components characterised by their electrical contacts
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Abstract
【解決手段】電子装置1は、少なくとも1つのパッド3を有する基板2と、基板2の少なくとも1つのパッド3に電気的に接続されるバンプ8を有し、基板2にフリップチップ実装された電子素子6と、パッド3とバンプ8とを電気的に接続する導電性樹脂4と、基板2と電子素子6との間に介在する絶縁性のシート5と、を備える。基板2は、電子素子6と対向する面に、パッド3毎に凹部2aを有する。パッド3は、凹部2aの少なくとも底部に形成される。導電性樹脂4は、パッド3上かつ凹部2a内に充填される。シート5は、バンプ8毎に、開口面積が凹部2aの開口面積より狭い貫通孔5aを有する。バンプ8は、貫通孔5aの内壁に接触して貫通孔5aに挿通されると共に、パッド3と直接接触せずに導電性樹脂4を介して電気的に接続される。
【選択図】図1
Description
2 基板
2a 凹部
3 パッド
4 導電性樹脂
5 シート
5a 貫通孔
6 電子素子(半導体素子)
7 パッド
8 バンプ
10 メタルマスク
Claims (6)
- 少なくとも1つのパッドを有する基板と、
前記基板の前記少なくとも1つのパッドに電気的に接続されるバンプを有し、前記基板にフリップチップ実装された電子素子と、
前記パッドと前記バンプとを電気的に接続する導電性樹脂と、を備える電子装置であって、
前記基板と前記電子素子との間に介在する絶縁性のシートをさらに備え、
前記基板は、前記電子素子と対向する面に、前記パッド毎に凹部を有し、
前記パッドは、前記凹部の少なくとも底部に形成され、
前記導電性樹脂は、前記パッド上かつ前記凹部内に充填され、
前記シートは、前記バンプ毎に、開口面積が前記凹部の開口面積よりも狭い貫通孔を有し、
前記バンプは、前記貫通孔の内壁に接触して前記貫通孔に挿通されると共に、前記パッドと直接接触せずに導電性樹脂を介して前記パッドに電気的に接続されることを特徴とする電子装置。 - 前記貫通孔の開口面積は、フリップチップ実装前の状態において前記凹部の開口面積よりも狭いことを特徴とする請求項1に記載の電子装置。
- 前記シートは、弾性を有する材料からなることを特徴とする請求項1又は2に記載の電子装置。
- フリップチップ実装前における前記貫通孔の幅は、前記バンプの最も広い幅よりも狭いことを特徴とする請求項3に記載の電子装置。
- 電子素子が基板にフリップチップ実装された電子装置の製造方法であって、
前記基板に少なくとも1つの凹部を形成する工程と、
前記少なくとも1つの凹部の底部に第1パッドを形成する工程と、
前記第1パッド上の前記凹部内に導電性樹脂を供給する工程と、
前記電子素子に少なくとも1つの第2パッドを形成し、前記第2パッドにバンプを形成する工程と、
少なくとも1つの貫通孔を有する絶縁性のシートを、前記貫通孔の位置が前記凹部上となるように、前記基板上に載置する工程と、
前記基板と前記電子素子との間に前記シートを介在させ、前記バンプを前記貫通孔に挿通させると共に前記凹部に挿入して、前記電子素子を前記基板に実装する工程と、
前記導電性樹脂が硬化するように加熱する工程と、を含み、
前記シートは、前記バンプと前記第1パッドが直接接触しないような厚みを有し、
前記貫通孔の開口面積は、前記凹部の開口面積よりも狭いことを特徴とする電子装置の製造方法。 - 前記シートは、弾性を有する材料からなり、
前記貫通孔の幅は、前記バンプの最も広い幅よりも狭いことを特徴とする請求項5に記載の電子装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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JP2007275318A JP2009105209A (ja) | 2007-10-23 | 2007-10-23 | 電子装置及びその製造方法 |
US12/256,153 US20090102048A1 (en) | 2007-10-23 | 2008-10-22 | Electronic device and manufacturing method thereof |
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JP2007275318A JP2009105209A (ja) | 2007-10-23 | 2007-10-23 | 電子装置及びその製造方法 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014154730A (ja) * | 2013-02-08 | 2014-08-25 | Olympus Corp | 半導体装置、固体撮像装置、および半導体装置の製造方法 |
WO2023282701A1 (ko) * | 2021-07-08 | 2023-01-12 | 삼성전자 주식회사 | 솔더볼과 탄성체를 기반으로 연결되는 기판 구조 |
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US8241964B2 (en) | 2010-05-13 | 2012-08-14 | Stats Chippac, Ltd. | Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation |
CN101996906B (zh) * | 2010-09-08 | 2012-06-13 | 中国科学院上海微系统与信息技术研究所 | 凹槽中焊接实现焊料倒扣焊的工艺方法 |
KR101677739B1 (ko) | 2010-09-29 | 2016-11-21 | 삼성전자주식회사 | 반도체 패키지 및 그의 제조방법 |
CN104811144A (zh) * | 2015-05-20 | 2015-07-29 | 中国电子科技集团公司第十三研究所 | 改善太赫兹混频器微组装的新型混合集成电路 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05267394A (ja) * | 1992-03-19 | 1993-10-15 | Sumitomo Electric Ind Ltd | 半導体素子の実装方法 |
JPH08307043A (ja) * | 1995-05-10 | 1996-11-22 | Olympus Optical Co Ltd | フリップチップ接合装置 |
JP2000100865A (ja) * | 1998-09-17 | 2000-04-07 | Nec Corp | 半導体装置およびその製造方法 |
JP2000150577A (ja) * | 1998-11-18 | 2000-05-30 | Toshiba Corp | 配線基板とその製造方法、半導体装置、これらを用いた電気部品とその製造方法 |
JP2005129726A (ja) * | 2003-10-23 | 2005-05-19 | Sony Corp | 半導体装置の実装方法 |
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JP3822040B2 (ja) * | 2000-08-31 | 2006-09-13 | 株式会社ルネサステクノロジ | 電子装置及びその製造方法 |
JP3933094B2 (ja) * | 2003-05-27 | 2007-06-20 | セイコーエプソン株式会社 | 電子部品の実装方法 |
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2007
- 2007-10-23 JP JP2007275318A patent/JP2009105209A/ja active Pending
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2008
- 2008-10-22 US US12/256,153 patent/US20090102048A1/en not_active Abandoned
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05267394A (ja) * | 1992-03-19 | 1993-10-15 | Sumitomo Electric Ind Ltd | 半導体素子の実装方法 |
JPH08307043A (ja) * | 1995-05-10 | 1996-11-22 | Olympus Optical Co Ltd | フリップチップ接合装置 |
JP2000100865A (ja) * | 1998-09-17 | 2000-04-07 | Nec Corp | 半導体装置およびその製造方法 |
JP2000150577A (ja) * | 1998-11-18 | 2000-05-30 | Toshiba Corp | 配線基板とその製造方法、半導体装置、これらを用いた電気部品とその製造方法 |
JP2005129726A (ja) * | 2003-10-23 | 2005-05-19 | Sony Corp | 半導体装置の実装方法 |
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JP2014154730A (ja) * | 2013-02-08 | 2014-08-25 | Olympus Corp | 半導体装置、固体撮像装置、および半導体装置の製造方法 |
WO2023282701A1 (ko) * | 2021-07-08 | 2023-01-12 | 삼성전자 주식회사 | 솔더볼과 탄성체를 기반으로 연결되는 기판 구조 |
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