JP2009099956A - Ｃｍｏｓ素子及びその製造方法 - Google Patents

Ｃｍｏｓ素子及びその製造方法 Download PDF

Info

Publication number
JP2009099956A
JP2009099956A JP2008231438A JP2008231438A JP2009099956A JP 2009099956 A JP2009099956 A JP 2009099956A JP 2008231438 A JP2008231438 A JP 2008231438A JP 2008231438 A JP2008231438 A JP 2008231438A JP 2009099956 A JP2009099956 A JP 2009099956A
Authority
JP
Japan
Prior art keywords
layer
semiconductor
cmos device
epi
deformed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008231438A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009099956A5 (enExample
Inventor
Dong-Hun Kang
東勳 姜
Sang Moon Lee
商文 李
Jushaku Den
重錫 田
Gwang-Hyeon Baek
光鉉 白
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2009099956A publication Critical patent/JP2009099956A/ja
Publication of JP2009099956A5 publication Critical patent/JP2009099956A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/798—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being provided in or under the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2008231438A 2007-10-16 2008-09-09 Ｃｍｏｓ素子及びその製造方法 Pending JP2009099956A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070104062A KR20090038653A (ko) 2007-10-16 2007-10-16 Ｃｍｏｓ 소자 및 그 제조방법

Publications (2)

Publication Number Publication Date
JP2009099956A true JP2009099956A (ja) 2009-05-07
JP2009099956A5 JP2009099956A5 (enExample) 2011-09-22

Family

ID=40533314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008231438A Pending JP2009099956A (ja) 2007-10-16 2008-09-09 Ｃｍｏｓ素子及びその製造方法

Country Status (4)

Country Link
US (1) US20090095981A1 (enExample)
JP (1) JP2009099956A (enExample)
KR (1) KR20090038653A (enExample)
CN (1) CN101414608A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011114160A (ja) * 2009-11-26 2011-06-09 Sumitomo Chemical Co Ltd 半導体基板、電子デバイスおよび半導体基板の製造方法
WO2011074195A1 (ja) * 2009-12-15 2011-06-23 住友化学株式会社 半導体基板、半導体デバイスおよび半導体基板の製造方法
US8575705B2 (en) 2010-01-18 2013-11-05 Samsung Electronics Co., Ltd. Semiconductor devices including MOS transistors having an optimized channel region and methods of fabricating the same
JP2015088756A (ja) * 2013-10-31 2015-05-07 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 基板構造体とそれを含むｃｍｏｓ素子及びその製造方法

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7790542B2 (en) * 2008-06-18 2010-09-07 International Business Machines Corporation CMOS devices having reduced threshold voltage variations and methods of manufacture thereof
US8395216B2 (en) * 2009-10-16 2013-03-12 Texas Instruments Incorporated Method for using hybrid orientation technology (HOT) in conjunction with selective epitaxy to form semiconductor devices with regions of different electron and hole mobilities and related apparatus
CN102664166B (zh) * 2012-05-31 2013-11-27 中国科学院上海微系统与信息技术研究所 一种cmos器件及其制作方法
KR102083495B1 (ko) * 2013-01-07 2020-03-02 삼성전자 주식회사 Ｃｍｏｓ 소자와 이를 포함하는 광학장치와 그 제조방법
KR102069275B1 (ko) * 2013-06-07 2020-01-22 삼성전자주식회사 변형된 채널층을 갖는 반도체 소자 및 그 제조 방법
KR102210325B1 (ko) 2013-09-06 2021-02-01 삼성전자주식회사 Ｃｍｏｓ 소자 및 그 제조 방법
US9418841B2 (en) * 2014-12-30 2016-08-16 International Business Machines Corporation Type III-V and type IV semiconductor device formation
CN104992930A (zh) * 2015-07-07 2015-10-21 西安电子科技大学 应变Ge CMOS集成器件的制备方法及其CMOS集成器件
US9613871B2 (en) 2015-07-16 2017-04-04 Samsung Electronics Co., Ltd. Semiconductor device and fabricating method thereof
CN105244320A (zh) * 2015-08-28 2016-01-13 西安电子科技大学 基于SOI的应变Ge沟道倒梯形栅CMOS集成器件及制备方法
CN105118809A (zh) * 2015-08-28 2015-12-02 西安电子科技大学 应变Ge槽型栅CMOS集成器件制备方法及其CMOS集成器件
US10593600B2 (en) 2016-02-24 2020-03-17 International Business Machines Corporation Distinct gate stacks for III-V-based CMOS circuits comprising a channel cap
US10062693B2 (en) * 2016-02-24 2018-08-28 International Business Machines Corporation Patterned gate dielectrics for III-V-based CMOS circuits
CN108257916B (zh) * 2016-12-28 2020-07-10 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6254459A (ja) * 1985-09-02 1987-03-10 Seiko Epson Corp 相補型電界効果トランジスタ
JP2000286418A (ja) * 1999-03-30 2000-10-13 Hitachi Ltd 半導体装置および半導体基板
WO2006007068A2 (en) * 2004-06-24 2006-01-19 International Business Machines Corporation Integration of strained ge into advanced cmos technology

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000216347A (ja) * 1999-01-20 2000-08-04 Toshiba Corp Ｃｍｏｓ半導体装置
US7662689B2 (en) * 2003-12-23 2010-02-16 Intel Corporation Strained transistor integration for CMOS
JP4604637B2 (ja) * 2004-10-07 2011-01-05 ソニー株式会社 半導体装置および半導体装置の製造方法
US7282402B2 (en) * 2005-03-30 2007-10-16 Freescale Semiconductor, Inc. Method of making a dual strained channel semiconductor device
TWI258172B (en) * 2005-08-24 2006-07-11 Ind Tech Res Inst Transistor device with strained Ge layer by selectively grown and fabricating method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6254459A (ja) * 1985-09-02 1987-03-10 Seiko Epson Corp 相補型電界効果トランジスタ
JP2000286418A (ja) * 1999-03-30 2000-10-13 Hitachi Ltd 半導体装置および半導体基板
WO2006007068A2 (en) * 2004-06-24 2006-01-19 International Business Machines Corporation Integration of strained ge into advanced cmos technology

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011114160A (ja) * 2009-11-26 2011-06-09 Sumitomo Chemical Co Ltd 半導体基板、電子デバイスおよび半導体基板の製造方法
WO2011074195A1 (ja) * 2009-12-15 2011-06-23 住友化学株式会社 半導体基板、半導体デバイスおよび半導体基板の製造方法
US8507952B2 (en) 2009-12-15 2013-08-13 Sumitomo Chemical Company, Limited Semiconductor wafer, semiconductor device, and method for producing semiconductor wafer
US8575705B2 (en) 2010-01-18 2013-11-05 Samsung Electronics Co., Ltd. Semiconductor devices including MOS transistors having an optimized channel region and methods of fabricating the same
JP2015088756A (ja) * 2013-10-31 2015-05-07 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 基板構造体とそれを含むｃｍｏｓ素子及びその製造方法

Also Published As

Publication number Publication date
US20090095981A1 (en) 2009-04-16
KR20090038653A (ko) 2009-04-21
CN101414608A (zh) 2009-04-22

Similar Documents

Publication Publication Date Title
JP2009099956A (ja) Ｃｍｏｓ素子及びその製造方法
US6870179B2 (en) Increasing stress-enhanced drive current in a MOS transistor
US9425319B2 (en) Integrated circuits including FINFET devices with lower contact resistance and reduced parasitic capacitance and methods for fabricating the same
KR100676385B1 (ko) 전계 효과 트랜지스터를 포함한 반도체 장치
US20210343716A1 (en) Tuning Tensile Strain on FinFET
CN100533766C (zh) 用于增进信道载子移动性之具有高应力衬料之基于Si-Ge的半导体装置
US20090311836A1 (en) Extremely-thin silicon-on-insulator transistor with raised source/drain
CN203774333U (zh) 半导体器件
US20070023795A1 (en) Semiconductor device and method of fabricating the same
US8242559B2 (en) Integrated circuit system with a floating dielectric region and method of manufacture thereof
JP2014038898A (ja) 半導体装置
US9779998B2 (en) Semiconductor device and method of manufacturing the same
TW201926711A (zh) 完全空乏型絕緣層上覆矽（ｆｄｓｏｉ）上的橫向雙擴散金屬氧化半導體（ｌｄｍｏｓ）元件致能高輸入電壓
US20180261595A1 (en) Method for forming a protection device having an inner contact spacer and the resulting devices
US7101765B2 (en) Enhancing strained device performance by use of multi narrow section layout
CN102239547A (zh) 用于以厚度降低的有源层形成应变晶体管的结构应变基板
US20060043424A1 (en) Enhanced PMOS via transverse stress
US7928512B2 (en) Semiconductor device
US20090221122A1 (en) MOS Field Effect Transistor and Manufacture Method Therefor
JP2005079277A (ja) 電界効果トランジスタ
US7348233B1 (en) Methods for fabricating a CMOS device including silicide contacts
US9472667B2 (en) III-V MOSFET with strained channel and semi-insulating bottom barrier
WO2003094239A1 (en) Semiconductor device having strained silicon and silicon germanium alloy layers
KR20100079132A (ko) 반도체 소자의 제조 방법
KR20090076598A (ko) 반도체 소자 및 그 제조방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110810

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110810

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130125

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130205

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130426

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20130723