JP2009076497A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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Abstract
【解決手段】半導体基板35に形成された複数の半導体チップ11の電極パッド23に内部接続端子12を形成し、内部接続端子12が形成された複数の半導体チップ11を覆う樹脂部材本体13−1と突出部13−2とを有した樹脂部材13を形成し、樹脂部材本体13−1上に金属層39を形成し、突出部13−2をアライメントマークとして用いて、配線パターン14の形成領域に対応する部分の金属層39上を覆うレジスト膜48を形成し、その後、レジスト膜48をマスクとして、金属層39をエッチングして、内部接続端子12と電気的に接続された配線パターン14を形成する。
【選択図】図22
Description
図11は、本発明の第1の実施の形態に係る半導体装置の断面図である。
図29は、本発明の第2の実施の形態に係る半導体装置の断面図である。図29において、第1の実施の形態の半導体装置10と同一構成部分には同一符号を付す。
11 半導体チップ
12 内部接続端子
13 樹脂部材
13−1 樹脂部材本体
13−1A 上面
13−2 突出部
14,51 配線パターン
16 導電性端子
17 ソルダーレジスト
18 外部接続端子
21,35 半導体基板
21A 表面
22 半導体集積回路
23 電極パッド
24 保護膜
27,52 パッド部
29,61A 開口部
35B 裏面
37 金属層付き支持板
38 支持板
38A 面
39,54 金属層
39A 上面
41 貫通部
43 下部金型
44 上部金型
46 樹脂
48,61 レジスト膜
55 めっき膜
A 外形位置
B 半導体装置形成領域
C 切断位置
E 突出量
H1,H2 高さ
M1 厚さ
R1,R2 直径
Claims (10)
- 電極パッドを備えた複数の半導体チップと、前記半導体チップが形成される半導体チップ形成領域を複数有する半導体基板と、前記電極パッドに配設された内部接続端子と、前記内部接続端子と電気的に接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記複数の半導体チップの前記電極パッドに前記内部接続端子を形成する内部接続端子形成工程と、
支持板に前記配線パターンの母材となる金属層が設けられた金属層付き支持板を準備する金属層付き支持板準備工程と、
前記半導体チップと対向する部分の前記金属層付き支持板に貫通部を形成する貫通部形成工程と、
前記内部接続端子と対向する部分の前記金属層に導電性端子を形成する導電性端子形成工程と、
前記内部接続端子と前記導電性端子とが対向するように、前記複数の半導体チップと前記金属層付き支持板とを対向配置させると共に、前記金属層付き支持板を押圧して、前記内部接続端子と前記金属層とを圧着する圧着工程と、
前記圧着工程後に、前記複数の半導体チップと前記金属層付き支持板との間、及び前記貫通部を樹脂で封止する封止工程と、
前記封止工程後に、前記支持板を除去して、前記支持板の前記貫通部に対応する部分の前記樹脂に突出部を形成する突出部形成工程と、
前記突出部をアライメントマークとして用いて、前記配線パターンの形成領域に対応する部分の前記金属層上を覆うレジスト膜を形成するレジスト膜形成工程と、
前記レジスト膜をマスクとして、前記金属層をエッチングして、前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記貫通部形成工程では、前記貫通部を少なくとも2つ以上形成することを特徴とする請求項1記載の半導体装置の製造方法。
- 前記貫通部形成工程では、前記貫通部を前記配線パターンが形成される配線パターン形成領域以外の領域に対応する部分の前記金属層付き支持板に形成することを特徴とする請求項1又は2記載の半導体装置の製造方法。
- 前記圧着工程では、前記金属層付き支持板に形成された前記貫通部をアライメントマークとして用いて、前記複数の半導体チップと前記金属層付き支持板を対向配置させることを特徴とする請求項1ないし3のうち、いずれか一項記載の半導体装置の製造方法。
- 前記封止工程では、前記樹脂をトランスファーモールド法により形成することを特徴とする請求項1ないし4のうち、いずれか一項記載の半導体装置の製造方法。
- 電極パッドを備えた複数の半導体チップと、前記半導体チップが形成される半導体チップ形成領域を複数有する半導体基板と、前記電極パッドに配設された内部接続端子と、前記内部接続端子と電気的に接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記複数の半導体チップの前記電極パッドに前記内部接続端子を形成する内部接続端子形成工程と、
支持板に金属層が設けられた金属層付き支持板を準備する金属層付き支持板準備工程と、
前記半導体チップと対向する部分の前記金属層付き支持板に貫通部を形成する貫通部形成工程と、
前記内部接続端子と対向する部分の前記金属層に導電性端子を形成する導電性端子形成工程と、
前記内部接続端子と前記導電性端子とが対向するように、前記複数の半導体チップと前記金属層付き支持板とを対向配置させると共に、前記金属層付き支持板を押圧して、前記内部接続端子と前記金属層とを圧着する圧着工程と、
前記圧着工程後に、前記複数の半導体チップと前記金属層付き支持板との間、及び前記貫通部を樹脂で封止する封止工程と、
前記封止工程後、前記支持板を除去して、前記支持板の前記貫通部に対応する部分の前記樹脂に突出部を形成する突出部形成工程と、
前記突出部をアライメントマークとして用いて、前記金属層上に前記配線パターンの形成領域に対応する部分に開口部を有したレジスト膜を形成するレジスト膜形成工程と、
前記金属層を給電層とする電解めっき法により、前記開口部に露出された部分の前記金属層にめっき膜を形成するめっき膜形成工程と、
前記めっき膜形成工程後に、前記レジスト膜を除去するレジスト膜除去工程と、
前記めっき膜が形成されていない部分の前記金属層を除去して、前記金属層及び前記めっき膜よりなる前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記貫通部形成工程では、前記貫通部を少なくとも2つ以上形成することを特徴とする請求項6記載の半導体装置の製造方法。
- 前記貫通部形成工程では、前記貫通部を前記配線パターンが形成される配線パターン形成領域以外の領域に対応する部分の前記金属層付き支持板に形成することを特徴とする請求項6又は7記載の半導体装置の製造方法。
- 前記圧着工程では、前記金属層付き支持板に形成された前記貫通部をアライメントマークとして用いて、前記複数の半導体チップと前記金属層付き支持板を対向配置させることを特徴とする請求項6ないし8のうち、いずれか一項記載の半導体装置の製造方法。
- 前記封止工程では、前記樹脂をトランスファーモールド法により形成することを特徴とする請求項6ないし9のうち、いずれか一項記載の半導体装置の製造方法。
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