JP2009033141A - 半導体装置及びその作製方法 - Google Patents

半導体装置及びその作製方法 Download PDF

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Publication number
JP2009033141A
JP2009033141A JP2008167699A JP2008167699A JP2009033141A JP 2009033141 A JP2009033141 A JP 2009033141A JP 2008167699 A JP2008167699 A JP 2008167699A JP 2008167699 A JP2008167699 A JP 2008167699A JP 2009033141 A JP2009033141 A JP 2009033141A
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Prior art keywords
film
insulating film
semiconductor
conductive film
conductive
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JP2008167699A
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Japanese (ja)
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JP2009033141A5 (enExample
Inventor
Yoshie Moriwaka
圭恵 森若
Tetsuya Kakehata
哲弥 掛端
Shunpei Yamazaki
舜平 山崎
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2008167699A priority Critical patent/JP2009033141A/ja
Publication of JP2009033141A publication Critical patent/JP2009033141A/ja
Publication of JP2009033141A5 publication Critical patent/JP2009033141A5/ja
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/49Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/691IGFETs having charge trapping gate insulators, e.g. MNOS transistors having more than two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2008167699A 2007-06-29 2008-06-26 半導体装置及びその作製方法 Withdrawn JP2009033141A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008167699A JP2009033141A (ja) 2007-06-29 2008-06-26 半導体装置及びその作製方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007173103 2007-06-29
JP2008167699A JP2009033141A (ja) 2007-06-29 2008-06-26 半導体装置及びその作製方法

Related Child Applications (1)

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JP2013191254A Division JP5606602B2 (ja) 2007-06-29 2013-09-16 半導体装置及び電子機器

Publications (2)

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JP2009033141A true JP2009033141A (ja) 2009-02-12
JP2009033141A5 JP2009033141A5 (enExample) 2011-05-26

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JP2008167699A Withdrawn JP2009033141A (ja) 2007-06-29 2008-06-26 半導体装置及びその作製方法
JP2013191254A Expired - Fee Related JP5606602B2 (ja) 2007-06-29 2013-09-16 半導体装置及び電子機器

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Country Status (5)

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US (4) US7851279B2 (enExample)
JP (2) JP2009033141A (enExample)
KR (2) KR101404439B1 (enExample)
CN (1) CN101689532B (enExample)
WO (1) WO2009004919A1 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011124563A (ja) * 2009-11-13 2011-06-23 Semiconductor Energy Lab Co Ltd 不揮発性メモリ素子を有する装置
JP2017143239A (ja) * 2015-08-04 2017-08-17 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作成方法
JP2022044680A (ja) * 2009-10-16 2022-03-17 株式会社半導体エネルギー研究所 半導体装置

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101534009B1 (ko) * 2008-10-21 2015-07-07 삼성디스플레이 주식회사 박막 트랜지스터 표시판과 그 제조 방법 및 박막 트랜지스터 표시판을 갖는 표시 장치
TW201023341A (en) * 2008-12-12 2010-06-16 Ind Tech Res Inst Integrated circuit structure
KR101782176B1 (ko) * 2009-07-18 2017-09-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제조 방법
WO2011010542A1 (en) 2009-07-23 2011-01-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
KR20190066086A (ko) 2009-11-06 2019-06-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
US8907392B2 (en) 2011-12-22 2014-12-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device including stacked sub memory cells
JP2014045175A (ja) 2012-08-02 2014-03-13 Semiconductor Energy Lab Co Ltd 半導体装置
KR20150033155A (ko) * 2013-09-23 2015-04-01 삼성디스플레이 주식회사 박막 트랜지스터 및 그 제조 방법
KR102220450B1 (ko) 2013-12-02 2021-02-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치
US9349751B2 (en) 2013-12-12 2016-05-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US10297653B2 (en) 2014-07-23 2019-05-21 Sony Corporation Display device, method of manufacturing display device, and electronic apparatus
US9847406B2 (en) 2015-08-27 2017-12-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, storage device, resistor circuit, display device, and electronic device
JP6811084B2 (ja) * 2015-12-18 2021-01-13 株式会社半導体エネルギー研究所 半導体装置
KR102763624B1 (ko) * 2018-02-12 2025-02-10 삼성디스플레이 주식회사 유기 발광 표시 장치
US11756934B2 (en) * 2021-04-16 2023-09-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1154761A (ja) * 1997-08-01 1999-02-26 Semiconductor Energy Lab Co Ltd 半導体集積回路およびその作製方法
JP2001298100A (ja) * 2000-02-01 2001-10-26 Semiconductor Energy Lab Co Ltd 不揮発性メモリ、半導体装置、およびその作製方法
JP2005259334A (ja) * 2004-02-10 2005-09-22 Semiconductor Energy Lab Co Ltd 不揮発性メモリ
JP2006013481A (ja) * 2004-05-28 2006-01-12 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5060034A (en) 1988-11-01 1991-10-22 Casio Computer Co., Ltd. Memory device using thin film transistors having an insulation film with si/n composition ratio of 0.85 to 1.1
JP3070099B2 (ja) * 1990-12-13 2000-07-24 ソニー株式会社 スタティックram
JP3082288B2 (ja) * 1991-05-09 2000-08-28 カシオ計算機株式会社 薄膜メモリトランジスタ及びその製造方法
JPH05145073A (ja) * 1991-11-22 1993-06-11 Seiko Epson Corp 相補型薄膜トランジスタ
JPH0730001A (ja) * 1993-07-09 1995-01-31 Mitsubishi Electric Corp 半導体装置
JP2643833B2 (ja) 1994-05-30 1997-08-20 日本電気株式会社 半導体記憶装置及びその製造方法
JP3253808B2 (ja) 1994-07-07 2002-02-04 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US5877054A (en) 1995-06-29 1999-03-02 Sharp Kabushiki Kaisha Method of making nonvolatile semiconductor memory
US5978270A (en) 1995-08-31 1999-11-02 Hitachi, Ltd. Semiconductor non-volatile memory device and computer system using the same
KR100205388B1 (ko) 1995-09-12 1999-07-01 구자홍 액정표시장치 및 그 제조방법
JPH09186335A (ja) * 1995-12-27 1997-07-15 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
TW347567B (en) 1996-03-22 1998-12-11 Philips Eloctronics N V Semiconductor device and method of manufacturing a semiconductor device
JP4401448B2 (ja) 1997-02-24 2010-01-20 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6060743A (en) 1997-05-21 2000-05-09 Kabushiki Kaisha Toshiba Semiconductor memory device having multilayer group IV nanocrystal quantum dot floating gate and method of manufacturing the same
US6307214B1 (en) 1997-06-06 2001-10-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor thin film and semiconductor device
JP4318768B2 (ja) 1997-07-23 2009-08-26 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3943245B2 (ja) * 1997-09-20 2007-07-11 株式会社半導体エネルギー研究所 半導体装置
JP3265569B2 (ja) * 1998-04-15 2002-03-11 日本電気株式会社 半導体装置及びその製造方法
JP2000200842A (ja) 1998-11-04 2000-07-18 Sony Corp 不揮発性半導体記憶装置、製造方法および書き込み方法
US8158980B2 (en) 2001-04-19 2012-04-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a pixel matrix circuit that includes a pixel TFT and a storage capacitor
JP4202502B2 (ja) 1998-12-28 2008-12-24 株式会社半導体エネルギー研究所 半導体装置
TW518637B (en) 1999-04-15 2003-01-21 Semiconductor Energy Lab Electro-optical device and electronic equipment
JP4531194B2 (ja) 1999-04-15 2010-08-25 株式会社半導体エネルギー研究所 電気光学装置及び電子機器
WO2001024265A1 (fr) 1999-09-30 2001-04-05 Rohm, Co., Ltd. Memoire non volatile
JP2001148434A (ja) 1999-10-12 2001-05-29 New Heiro:Kk 不揮発性メモリセルおよびその使用方法、製造方法ならびに不揮発性メモリアレイ
WO2001047012A1 (en) 1999-12-21 2001-06-28 Koninklijke Philips Electronics N.V. Non-volatile memory cells and periphery
US20020113268A1 (en) * 2000-02-01 2002-08-22 Jun Koyama Nonvolatile memory, semiconductor device and method of manufacturing the same
US6423644B1 (en) 2000-07-12 2002-07-23 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
US6440870B1 (en) 2000-07-12 2002-08-27 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
JP2002113286A (ja) 2000-10-06 2002-04-16 Matsushita Electric Works Ltd 洗濯機用防水パン
JP4815695B2 (ja) * 2001-05-24 2011-11-16 ソニー株式会社 不揮発性半導体メモリ装置の動作方法
US6759282B2 (en) 2001-06-12 2004-07-06 International Business Machines Corporation Method and structure for buried circuits and devices
KR100487523B1 (ko) 2002-04-15 2005-05-03 삼성전자주식회사 부유트랩형 비휘발성 메모리 소자 및 그 제조방법
US6853035B1 (en) 2002-06-28 2005-02-08 Synopsys, Inc. Negative differential resistance (NDR) memory device with reduced soft error rate
US6730957B1 (en) 2002-11-05 2004-05-04 Winbond Electronics Corporation Non-volatile memory compatible with logic devices and fabrication method thereof
JP2005005516A (ja) * 2003-06-12 2005-01-06 Renesas Technology Corp 半導体装置およびその製造方法
US7652321B2 (en) 2004-03-08 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method of the same
US7504663B2 (en) 2004-05-28 2009-03-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with a floating gate electrode that includes a plurality of particles
US7606066B2 (en) * 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1154761A (ja) * 1997-08-01 1999-02-26 Semiconductor Energy Lab Co Ltd 半導体集積回路およびその作製方法
JP2001298100A (ja) * 2000-02-01 2001-10-26 Semiconductor Energy Lab Co Ltd 不揮発性メモリ、半導体装置、およびその作製方法
JP2005259334A (ja) * 2004-02-10 2005-09-22 Semiconductor Energy Lab Co Ltd 不揮発性メモリ
JP2006013481A (ja) * 2004-05-28 2006-01-12 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022044680A (ja) * 2009-10-16 2022-03-17 株式会社半導体エネルギー研究所 半導体装置
JP7383739B2 (ja) 2009-10-16 2023-11-20 株式会社半導体エネルギー研究所 半導体装置
US11837461B2 (en) 2009-10-16 2023-12-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2024012542A (ja) * 2009-10-16 2024-01-30 株式会社半導体エネルギー研究所 半導体装置
JP7482310B2 (ja) 2009-10-16 2024-05-13 株式会社半導体エネルギー研究所 半導体装置
US12389631B2 (en) 2009-10-16 2025-08-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2011124563A (ja) * 2009-11-13 2011-06-23 Semiconductor Energy Lab Co Ltd 不揮発性メモリ素子を有する装置
JP2017143239A (ja) * 2015-08-04 2017-08-17 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作成方法
US11217668B2 (en) 2015-08-04 2022-01-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
US20140035028A1 (en) 2014-02-06
US20090001452A1 (en) 2009-01-01
KR101420603B1 (ko) 2014-07-17
KR20130069885A (ko) 2013-06-26
KR101404439B1 (ko) 2014-06-10
JP5606602B2 (ja) 2014-10-15
US20110291173A1 (en) 2011-12-01
CN101689532B (zh) 2013-06-12
WO2009004919A1 (en) 2009-01-08
US8581332B2 (en) 2013-11-12
KR20100047853A (ko) 2010-05-10
JP2014017507A (ja) 2014-01-30
US7851279B2 (en) 2010-12-14
US8022469B2 (en) 2011-09-20
US20110073934A1 (en) 2011-03-31
CN101689532A (zh) 2010-03-31
US9184173B2 (en) 2015-11-10

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