JP2008543092A - ミリメートル波アプリケーションのためのアンテナを集積回路チップと共にパッケージングするための装置及び方法 - Google Patents

ミリメートル波アプリケーションのためのアンテナを集積回路チップと共にパッケージングするための装置及び方法 Download PDF

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Publication number
JP2008543092A
JP2008543092A JP2008514962A JP2008514962A JP2008543092A JP 2008543092 A JP2008543092 A JP 2008543092A JP 2008514962 A JP2008514962 A JP 2008514962A JP 2008514962 A JP2008514962 A JP 2008514962A JP 2008543092 A JP2008543092 A JP 2008543092A
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Japan
Prior art keywords
package
antenna
chip
frame
forming
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Pending
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JP2008514962A
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Japanese (ja)
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JP2008543092A5 (enExample
Inventor
チェン、ジー、ニン
リュー、ドゥイシェン
プファイファー、ウルリヒ、アール．
ツビック、トーマス、エム．
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International Business Machines Corp
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International Business Machines Corp
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Publication of JP2008543092A publication Critical patent/JP2008543092A/ja
Publication of JP2008543092A5 publication Critical patent/JP2008543092A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/12—Supports; Mounting means
    • H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01087—Francium [Fr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H01L2924/30111—Impedance matching

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)
  • Details Of Aerials (AREA)
  • Credit Cards Or The Like (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Support Of Aerials (AREA)
JP2008514962A 2005-06-03 2006-06-05 ミリメートル波アプリケーションのためのアンテナを集積回路チップと共にパッケージングするための装置及び方法 Pending JP2008543092A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/144,504 US20060276157A1 (en) 2005-06-03 2005-06-03 Apparatus and methods for packaging antennas with integrated circuit chips for millimeter wave applications
PCT/US2006/021770 WO2006133108A2 (en) 2005-06-03 2006-06-05 Packaging antennas with integrated circuit chips

Publications (2)

Publication Number Publication Date
JP2008543092A true JP2008543092A (ja) 2008-11-27
JP2008543092A5 JP2008543092A5 (enExample) 2009-03-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008514962A Pending JP2008543092A (ja) 2005-06-03 2006-06-05 ミリメートル波アプリケーションのためのアンテナを集積回路チップと共にパッケージングするための装置及び方法

Country Status (6)

Country Link
US (1) US20060276157A1 (enExample)
EP (1) EP1886412A4 (enExample)
JP (1) JP2008543092A (enExample)
CN (1) CN101496298A (enExample)
TW (1) TW200735320A (enExample)
WO (1) WO2006133108A2 (enExample)

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JP2015005599A (ja) * 2013-06-20 2015-01-08 ルネサスエレクトロニクス株式会社 半導体装置
KR101874077B1 (ko) 2011-08-31 2018-07-03 퀄컴 인코포레이티드 3-ｄ 안테나 시스템을 갖춘 무선 디바이스
KR20180079177A (ko) * 2016-12-30 2018-07-10 아나로그 디바이시즈 인코포레이티드 통합 안테나를 갖는 패키지된 디바이스

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US20060276157A1 (en) 2006-12-07
WO2006133108A2 (en) 2006-12-14

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