JP2008311592A - 電子装置の製造方法 - Google Patents
電子装置の製造方法 Download PDFInfo
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Abstract
【解決手段】基板101Aに形成された電極パッド103上に突起部104Bを有したバンプ104を形成する工程と、基板101A上に絶縁層105を形成すると共に突起部104Bの一部を該絶縁層105の上面に露出させる工程と、絶縁層105の上面及び突起部104Bの露出した部分に蒸着法を用いて第1の導電パターン107を形成する工程と、第1の導電パターン107を給電層として電解メッキを行うことにより第2の導電パターン108を形成する工程と、第2の導電パターン108をパターニングしてバンプ104に接続した導電パターン106を形成する工程とを有する。
【選択図】図3G
Description
基板本体に形成された電極パッド上に、突起部を有するバンプを形成する第1の工程と、
前記基板本体上に絶縁層を形成すると共に、前記突起部の一部を前記絶縁層の上面に露出させる第2の工程と、
前記絶縁層の上面及び前記突起部の露出した部分に蒸着法を用いて導電層を形成する第3の工程と、
前記導電層を給電層とした電解メッキにより配線層を形成する第4の工程と、
該配線層をパターニングして前記バンプに接続した導電パターンを形成する第5の工程とを有することを特徴とする電子装置の製造方法により解決することができる。
電極パッドが形成された基板本体と、
前記電極パッド上に形成されたバンプと、
前記基板本体上に形成された絶縁層と、
該絶縁層上に形成されると共に前記バンプに接続された導電パターンとを有し、
前記バンプと前記導電パターンが金属接合してなることを特徴とする電子装置により解決することができる。
101 半導体チップ
101A 基板
102 保護層
103 電極パッド
104 バンプ
104A バンプ本体
104B 突起部
105 絶縁層
106 導電パターン
107 第1の導電パターン
107A 導電層
108 第2の導電パターン
108A 導電層
109 ソルダーレジスト層
110 はんだバンプ
112 銅箔
114 Ti膜
115 Cu膜
基板本体に形成された電極パッド上に、突起部を有するバンプを形成する第1の工程と、
前記基板本体上に絶縁層を形成し、該絶縁層上に該絶縁層と対向する側の面が粗面とされた銅箔を配設し、該銅箔を前記絶縁層に圧着することにより前記突起部の一部を前記絶縁層の上面に露出させると共に前記粗面を前記絶縁層及び前記突起部の前記絶縁層から露出した一部に転写し、その後、前記銅箔を除去する第2の工程と、
前記粗面が転写された前記絶縁層の上面及び前記突起部の露出した部分に、先ず蒸着法を用いてチタン膜を形成し、次に該チタン膜の上部に蒸着法を用いて銅膜を形成することにより導電層を形成する第3の工程と、
前記導電層を給電層とした電解メッキにより配線層を形成する第4の工程と、
該配線層をパターニングして前記バンプに接続した導電パターンを形成する第5の工程とを有することを特徴とする電子装置の製造方法により解決することができる。
電極パッドが形成された基板本体と、
前記電極パッド上に形成されたバンプと、
前記基板本体上に形成された絶縁層と、
該絶縁層上に形成されると共に前記バンプに接続された導電パターンとを有した電子装置であって、
前記導電パターンは、チタン膜と銅膜とが積層された構成を有し、
前記バンプと前記チタン膜とが金属接合すると共に、該チタン膜と前記銅膜とが金属接合し、
かつ、前記絶縁層、前記チタン膜、及び前記銅膜の表面に粗面が形成されてなることを特徴とする電子装置により解決することができる。
Claims (8)
- 基板本体に形成された電極パッド上に、突起部を有するバンプを形成する第1の工程と、
前記基板本体上に絶縁層を形成すると共に、前記突起部の一部を前記絶縁層の上面に露出させる第2の工程と、
前記絶縁層の上面及び前記突起部の露出した部分に蒸着法を用いて導電層を形成する第3の工程と、
前記導電層を給電層とした電解メッキにより配線層を形成する第4の工程と、
該配線層をパターニングして前記バンプに接続した導電パターンを形成する第5の工程と、
を有することを特徴とする電子装置の製造方法。 - 前記基板本体は、半導体基板であることを特徴とする請求項1記載の電子装置の製造方法。
- 前記第3の工程で実施される蒸着法は物理蒸着法であることを特徴とする請求項1又は2記載の電子装置の製造方法。
- 前記第3の工程では、前記導電層として先ず密着金属膜を形成し、その後に該密着金属膜の上部に銅膜を形成することを特徴とする請求項1乃至3のいずれか一項に記載の電子装置の製造方法。
- 前記第3の工程では、前記導電層として銅膜を形成することを特徴とする請求項1乃至3のいずれか一項に記載の電子装置の製造方法。
- 前記第1の工程では、前記バンプがボンディングワイヤにより形成されることを特徴とする請求項1乃至5のいずれか1項記載の電子装置の製造方法。
- 電極パッドが形成された基板本体と、
前記電極パッド上に形成されたバンプと、
前記基板本体上に形成された絶縁層と、
該絶縁層上に形成されると共に前記バンプに接続された導電パターンとを有し、
前記バンプと前記導電パターンが金属接合してなることを特徴とする電子装置。 - 前記基板本体が半導体チップであることを特徴とする請求項7記載の電子装置。
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JP2007160613A JP4121542B1 (ja) | 2007-06-18 | 2007-06-18 | 電子装置の製造方法 |
TW097120902A TW200901347A (en) | 2007-06-18 | 2008-06-05 | Electronic device manufacturing method and electronic device |
KR1020080056099A KR20080111397A (ko) | 2007-06-18 | 2008-06-16 | 전자 장치의 제조 방법 및 전자 장치 |
US12/140,706 US7795127B2 (en) | 2007-06-18 | 2008-06-17 | Electronic device manufacturing method and electronic device |
CNA2008101266191A CN101330028A (zh) | 2007-06-18 | 2008-06-17 | 电子器件的制造方法以及电子器件 |
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EP (1) | EP2048712A3 (ja) |
JP (1) | JP4121542B1 (ja) |
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JP2012004504A (ja) * | 2010-06-21 | 2012-01-05 | Shinko Electric Ind Co Ltd | 電子装置及びその製造方法 |
JP2012004506A (ja) * | 2010-06-21 | 2012-01-05 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2012004505A (ja) * | 2010-06-21 | 2012-01-05 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2012044180A (ja) * | 2010-08-18 | 2012-03-01 | Samsung Electro-Mechanics Co Ltd | 微細ピッチバンプを備えた基板及びその製造方法 |
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JP5436837B2 (ja) * | 2008-10-30 | 2014-03-05 | 新光電気工業株式会社 | 半導体装置内蔵基板の製造方法 |
JP5436836B2 (ja) * | 2008-10-30 | 2014-03-05 | 新光電気工業株式会社 | 半導体装置内蔵基板の製造方法 |
JP5406572B2 (ja) * | 2009-03-19 | 2014-02-05 | 新光電気工業株式会社 | 電子部品内蔵配線基板及びその製造方法 |
JP2012134270A (ja) * | 2010-12-21 | 2012-07-12 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
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US20080315414A1 (en) | 2008-12-25 |
KR20080111397A (ko) | 2008-12-23 |
US7795127B2 (en) | 2010-09-14 |
TW200901347A (en) | 2009-01-01 |
EP2048712A2 (en) | 2009-04-15 |
CN101330028A (zh) | 2008-12-24 |
JP4121542B1 (ja) | 2008-07-23 |
EP2048712A3 (en) | 2009-11-04 |
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