JP2008131050A - 半導体素子への金属含有膜の集積方法 - Google Patents

半導体素子への金属含有膜の集積方法 Download PDF

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Publication number
JP2008131050A
JP2008131050A JP2007299433A JP2007299433A JP2008131050A JP 2008131050 A JP2008131050 A JP 2008131050A JP 2007299433 A JP2007299433 A JP 2007299433A JP 2007299433 A JP2007299433 A JP 2007299433A JP 2008131050 A JP2008131050 A JP 2008131050A
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Japan
Prior art keywords
substrate
metal
containing film
tungsten
film
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Pending
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JP2007299433A
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English (en)
Japanese (ja)
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JP2008131050A5 (https=
Inventor
Shigeo Ashigaki
繁雄 芦垣
Hideaki Yamazaki
英亮 山▲崎▼
Tomoyuki Sakota
智幸 迫田
Mikio Suzuki
幹夫 鈴木
Motoshi Nakamura
源志 中村
Gert Leusink
リューシンク ヘルト
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of JP2008131050A publication Critical patent/JP2008131050A/ja
Publication of JP2008131050A5 publication Critical patent/JP2008131050A5/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01316Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of elemental metal contacting the insulator, e.g. Ta, W, Mo or Al
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/665Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum
    • H10D64/666Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum the conductor further comprising additional layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/418Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials the conductive layers comprising transition metals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43Chemical deposition, e.g. chemical vapour deposition [CVD]

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  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2007299433A 2006-11-20 2007-11-19 半導体素子への金属含有膜の集積方法 Pending JP2008131050A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/561,810 US7674710B2 (en) 2006-11-20 2006-11-20 Method of integrating metal-containing films into semiconductor devices

Publications (2)

Publication Number Publication Date
JP2008131050A true JP2008131050A (ja) 2008-06-05
JP2008131050A5 JP2008131050A5 (https=) 2010-12-24

Family

ID=39417437

Family Applications (1)

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JP2007299433A Pending JP2008131050A (ja) 2006-11-20 2007-11-19 半導体素子への金属含有膜の集積方法

Country Status (3)

Country Link
US (1) US7674710B2 (https=)
JP (1) JP2008131050A (https=)
KR (1) KR20080045652A (https=)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009142251A1 (ja) 2008-05-19 2009-11-26 日本電気株式会社 二次電池
JP2010059542A (ja) * 2008-08-05 2010-03-18 Tokyo Electron Ltd 載置台構造、成膜装置及び成膜方法
WO2012066977A1 (ja) * 2010-11-19 2012-05-24 株式会社日立国際電気 半導体装置の製造方法、基板処理方法および基板処理装置
WO2014066792A1 (en) * 2012-10-26 2014-05-01 Applied Materials, Inc. Methods for depositing fluorine/carbon-free conformal tungsten
JP2014195066A (ja) * 2013-02-28 2014-10-09 Hitachi Kokusai Electric Inc 半導体装置の製造方法、基板処理装置及び基板処理システム
CN112840063A (zh) * 2018-10-10 2021-05-25 恩特格里斯公司 用于沉积钨薄膜或钼薄膜的方法
US11043386B2 (en) 2012-10-26 2021-06-22 Applied Materials, Inc. Enhanced spatial ALD of metals through controlled precursor mixing

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8866271B2 (en) * 2010-10-07 2014-10-21 Hitachi Kokusai Electric Inc. Semiconductor device manufacturing method, substrate processing apparatus and semiconductor device
JP2013084902A (ja) * 2011-09-26 2013-05-09 Dainippon Screen Mfg Co Ltd 熱処理方法および熱処理装置
KR20140003154A (ko) * 2012-06-29 2014-01-09 에스케이하이닉스 주식회사 반도체 장치 제조 방법
JP7539480B2 (ja) * 2020-09-23 2024-08-23 株式会社Kokusai Electric 基板処理方法、プログラム、基板処理装置及び半導体装置の製造方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02225670A (ja) * 1989-02-23 1990-09-07 Toyota Motor Corp Cvd法による金属薄膜の成膜方法
JPH0427136A (ja) * 1990-04-11 1992-01-30 Mitsubishi Electric Corp 有機金属ガス利用薄膜形成装置
JPH04173976A (ja) * 1990-11-02 1992-06-22 Mitsubishi Electric Corp 薄膜形成装置
JPH10135452A (ja) * 1996-10-30 1998-05-22 Internatl Business Mach Corp <Ibm> 中間ギャップ作業関数タングステン・ゲートの製造方法
JP2002124488A (ja) * 2000-07-31 2002-04-26 Applied Materials Inc W(co)6からのタングステン膜の堆積方法
JP2004156104A (ja) * 2002-11-06 2004-06-03 Tokyo Electron Ltd 成膜方法
JP2005243664A (ja) * 2004-02-24 2005-09-08 Renesas Technology Corp 半導体装置およびその製造方法
JP2006257551A (ja) * 2005-03-15 2006-09-28 Asm Internatl Nv Aldによる貴金属の促進された堆積

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3786569B2 (ja) * 2000-08-14 2006-06-14 松下電器産業株式会社 半導体装置の製造方法
US20020132473A1 (en) * 2001-03-13 2002-09-19 Applied Materials ,Inc. Integrated barrier layer structure for copper contact level metallization
US7189431B2 (en) * 2004-09-30 2007-03-13 Tokyo Electron Limited Method for forming a passivated metal layer
JP4372021B2 (ja) * 2005-01-28 2009-11-25 株式会社東芝 半導体装置の製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02225670A (ja) * 1989-02-23 1990-09-07 Toyota Motor Corp Cvd法による金属薄膜の成膜方法
JPH0427136A (ja) * 1990-04-11 1992-01-30 Mitsubishi Electric Corp 有機金属ガス利用薄膜形成装置
JPH04173976A (ja) * 1990-11-02 1992-06-22 Mitsubishi Electric Corp 薄膜形成装置
JPH10135452A (ja) * 1996-10-30 1998-05-22 Internatl Business Mach Corp <Ibm> 中間ギャップ作業関数タングステン・ゲートの製造方法
JP2002124488A (ja) * 2000-07-31 2002-04-26 Applied Materials Inc W(co)6からのタングステン膜の堆積方法
JP2004156104A (ja) * 2002-11-06 2004-06-03 Tokyo Electron Ltd 成膜方法
JP2005243664A (ja) * 2004-02-24 2005-09-08 Renesas Technology Corp 半導体装置およびその製造方法
JP2006257551A (ja) * 2005-03-15 2006-09-28 Asm Internatl Nv Aldによる貴金属の促進された堆積

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009142251A1 (ja) 2008-05-19 2009-11-26 日本電気株式会社 二次電池
JP2010059542A (ja) * 2008-08-05 2010-03-18 Tokyo Electron Ltd 載置台構造、成膜装置及び成膜方法
US8822350B2 (en) 2010-11-19 2014-09-02 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device, substrate processing method and substrate processing apparatus
WO2012066977A1 (ja) * 2010-11-19 2012-05-24 株式会社日立国際電気 半導体装置の製造方法、基板処理方法および基板処理装置
JP5562434B2 (ja) * 2010-11-19 2014-07-30 株式会社日立国際電気 半導体装置の製造方法、基板処理方法、基板処理装置およびプログラム
US9601339B2 (en) 2012-10-26 2017-03-21 Applied Materials, Inc. Methods for depositing fluorine/carbon-free conformal tungsten
US9230815B2 (en) 2012-10-26 2016-01-05 Appled Materials, Inc. Methods for depositing fluorine/carbon-free conformal tungsten
WO2014066792A1 (en) * 2012-10-26 2014-05-01 Applied Materials, Inc. Methods for depositing fluorine/carbon-free conformal tungsten
US10985023B2 (en) 2012-10-26 2021-04-20 Applied Materials, Inc. Methods for depositing fluorine/carbon-free conformal tungsten
US11043386B2 (en) 2012-10-26 2021-06-22 Applied Materials, Inc. Enhanced spatial ALD of metals through controlled precursor mixing
US11887856B2 (en) 2012-10-26 2024-01-30 Applied Materials, Inc. Enhanced spatial ALD of metals through controlled precursor mixing
US11887855B2 (en) 2012-10-26 2024-01-30 Applied Materials, Inc. Methods for depositing fluorine/carbon-free conformal tungsten
JP2014195066A (ja) * 2013-02-28 2014-10-09 Hitachi Kokusai Electric Inc 半導体装置の製造方法、基板処理装置及び基板処理システム
CN112840063A (zh) * 2018-10-10 2021-05-25 恩特格里斯公司 用于沉积钨薄膜或钼薄膜的方法
JP2022504527A (ja) * 2018-10-10 2022-01-13 インテグリス・インコーポレーテッド タングステン膜又はモリブデン膜を堆積させるための方法
JP7196291B2 (ja) 2018-10-10 2022-12-26 インテグリス・インコーポレーテッド タングステン膜又はモリブデン膜を堆積させるための方法

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US7674710B2 (en) 2010-03-09
KR20080045652A (ko) 2008-05-23
US20080119033A1 (en) 2008-05-22

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