KR20080045652A - 반도체 디바이스에 금속 함유 필름을 집적하는 방법 - Google Patents
반도체 디바이스에 금속 함유 필름을 집적하는 방법 Download PDFInfo
- Publication number
- KR20080045652A KR20080045652A KR1020070118450A KR20070118450A KR20080045652A KR 20080045652 A KR20080045652 A KR 20080045652A KR 1020070118450 A KR1020070118450 A KR 1020070118450A KR 20070118450 A KR20070118450 A KR 20070118450A KR 20080045652 A KR20080045652 A KR 20080045652A
- Authority
- KR
- South Korea
- Prior art keywords
- substrate
- containing film
- film
- metal
- tungsten
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01316—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of elemental metal contacting the insulator, e.g. Ta, W, Mo or Al
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/665—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum
- H10D64/666—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum the conductor further comprising additional layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/418—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials the conductive layers comprising transition metals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
- H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
Landscapes
- Chemical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/561,810 US7674710B2 (en) | 2006-11-20 | 2006-11-20 | Method of integrating metal-containing films into semiconductor devices |
| US11/561,810 | 2006-11-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20080045652A true KR20080045652A (ko) | 2008-05-23 |
Family
ID=39417437
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020070118450A Ceased KR20080045652A (ko) | 2006-11-20 | 2007-11-20 | 반도체 디바이스에 금속 함유 필름을 집적하는 방법 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7674710B2 (https=) |
| JP (1) | JP2008131050A (https=) |
| KR (1) | KR20080045652A (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101414849B1 (ko) * | 2011-09-26 | 2014-07-03 | 다이닛뽕스크린 세이조오 가부시키가이샤 | 열처리방법 및 열처리장치 |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20110005880A (ko) | 2008-05-19 | 2011-01-19 | 닛본 덴끼 가부시끼가이샤 | 2 차 전지 |
| CN102112649A (zh) * | 2008-08-05 | 2011-06-29 | 东京毅力科创株式会社 | 载置台构造 |
| US8866271B2 (en) * | 2010-10-07 | 2014-10-21 | Hitachi Kokusai Electric Inc. | Semiconductor device manufacturing method, substrate processing apparatus and semiconductor device |
| US8822350B2 (en) | 2010-11-19 | 2014-09-02 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing method and substrate processing apparatus |
| KR20140003154A (ko) * | 2012-06-29 | 2014-01-09 | 에스케이하이닉스 주식회사 | 반도체 장치 제조 방법 |
| US11043386B2 (en) | 2012-10-26 | 2021-06-22 | Applied Materials, Inc. | Enhanced spatial ALD of metals through controlled precursor mixing |
| US9230815B2 (en) | 2012-10-26 | 2016-01-05 | Appled Materials, Inc. | Methods for depositing fluorine/carbon-free conformal tungsten |
| JP6308584B2 (ja) * | 2013-02-28 | 2018-04-11 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理装置、基板処理システム及びプログラム |
| US11761081B2 (en) | 2018-10-10 | 2023-09-19 | Entegris, Inc. | Methods for depositing tungsten or molybdenum films |
| JP7539480B2 (ja) * | 2020-09-23 | 2024-08-23 | 株式会社Kokusai Electric | 基板処理方法、プログラム、基板処理装置及び半導体装置の製造方法 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02225670A (ja) * | 1989-02-23 | 1990-09-07 | Toyota Motor Corp | Cvd法による金属薄膜の成膜方法 |
| JPH0427136A (ja) * | 1990-04-11 | 1992-01-30 | Mitsubishi Electric Corp | 有機金属ガス利用薄膜形成装置 |
| JP2726149B2 (ja) * | 1990-11-02 | 1998-03-11 | 三菱電機株式会社 | 薄膜形成装置 |
| US5789312A (en) * | 1996-10-30 | 1998-08-04 | International Business Machines Corporation | Method of fabricating mid-gap metal gates compatible with ultra-thin dielectrics |
| US6218301B1 (en) * | 2000-07-31 | 2001-04-17 | Applied Materials, Inc. | Deposition of tungsten films from W(CO)6 |
| JP3786569B2 (ja) * | 2000-08-14 | 2006-06-14 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| US20020132473A1 (en) * | 2001-03-13 | 2002-09-19 | Applied Materials ,Inc. | Integrated barrier layer structure for copper contact level metallization |
| JP4126219B2 (ja) * | 2002-11-06 | 2008-07-30 | 東京エレクトロン株式会社 | 成膜方法 |
| JP2005243664A (ja) * | 2004-02-24 | 2005-09-08 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7189431B2 (en) * | 2004-09-30 | 2007-03-13 | Tokyo Electron Limited | Method for forming a passivated metal layer |
| JP4372021B2 (ja) * | 2005-01-28 | 2009-11-25 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2006257551A (ja) * | 2005-03-15 | 2006-09-28 | Asm Internatl Nv | Aldによる貴金属の促進された堆積 |
-
2006
- 2006-11-20 US US11/561,810 patent/US7674710B2/en not_active Expired - Fee Related
-
2007
- 2007-11-19 JP JP2007299433A patent/JP2008131050A/ja active Pending
- 2007-11-20 KR KR1020070118450A patent/KR20080045652A/ko not_active Ceased
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101414849B1 (ko) * | 2011-09-26 | 2014-07-03 | 다이닛뽕스크린 세이조오 가부시키가이샤 | 열처리방법 및 열처리장치 |
| US8852966B2 (en) | 2011-09-26 | 2014-10-07 | Dainippon Screen Mfg. Co., Ltd. | Heat treatment method and heat treatment apparatus of thin film |
Also Published As
| Publication number | Publication date |
|---|---|
| US7674710B2 (en) | 2010-03-09 |
| US20080119033A1 (en) | 2008-05-22 |
| JP2008131050A (ja) | 2008-06-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR20080045652A (ko) | 반도체 디바이스에 금속 함유 필름을 집적하는 방법 | |
| US10388530B2 (en) | Method of manufacturing semiconductor device and substrate processing apparatus | |
| US8492258B2 (en) | Method of manufacturing semiconductor device and substrate processing apparatus | |
| US8728935B2 (en) | Method of manufacturing semiconductor device, method of processing substrate and substrate processing apparatus | |
| US6974779B2 (en) | Interfacial oxidation process for high-k gate dielectric process integration | |
| JP4863296B2 (ja) | 半導体装置の製造方法 | |
| US20150279682A1 (en) | Method of manufacturing semiconductor device, substrate processing apparatus, and non-transitory computer-readable recording medium | |
| US9059089B2 (en) | Method of manufacturing semiconductor device | |
| JP2007516599A (ja) | ゲルマニウム上の堆積前の表面調製 | |
| TW201842539A (zh) | 金屬氮化物膜的選擇性蝕刻 | |
| JP4914573B2 (ja) | 高誘電体ゲート絶縁膜及び金属ゲート電極を有する電界効果トランジスタの製造方法 | |
| KR100803803B1 (ko) | 반도체 장치 및 그 제조방법 | |
| KR100930434B1 (ko) | W계 막의 성막 방법, 게이트 전극의 형성 방법, 및 반도체장치의 제조 방법 | |
| JP4523994B2 (ja) | 電界効果トランジスタの製造方法 | |
| JP6061385B2 (ja) | 半導体装置の製造方法、基板処理装置およびプログラム | |
| US20090087550A1 (en) | Sequential flow deposition of a tungsten silicide gate electrode film | |
| TW202301484A (zh) | 基於非晶矽的清除及密封等效氧化物厚度 | |
| JP4523995B2 (ja) | 電界効果トランジスタの製造方法 | |
| JPWO2006090645A1 (ja) | 半導体装置の製造方法および基板処理装置 | |
| US20050170665A1 (en) | Method of forming a high dielectric film | |
| JP2009124177A (ja) | high−K誘電膜上に金属ゲートを蒸着する方法及び、high−K誘電膜と金属ゲートとの界面を向上させる方法、並びに、基板処理システム |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-3-3-R10-R18-oth-X000 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| A201 | Request for examination | ||
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| D13-X000 | Search requested |
St.27 status event code: A-1-2-D10-D13-srh-X000 |
|
| D14-X000 | Search report completed |
St.27 status event code: A-1-2-D10-D14-srh-X000 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
St.27 status event code: N-2-6-B10-B15-exm-PE0601 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |