JP2007512680A5 - - Google Patents

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Publication number
JP2007512680A5
JP2007512680A5 JP2006523830A JP2006523830A JP2007512680A5 JP 2007512680 A5 JP2007512680 A5 JP 2007512680A5 JP 2006523830 A JP2006523830 A JP 2006523830A JP 2006523830 A JP2006523830 A JP 2006523830A JP 2007512680 A5 JP2007512680 A5 JP 2007512680A5
Authority
JP
Japan
Prior art keywords
semiconductor layer
depositing
pattern
aperture mask
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006523830A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007512680A (ja
Filing date
Publication date
Priority claimed from US10/642,919 external-priority patent/US20070178710A1/en
Application filed filed Critical
Publication of JP2007512680A publication Critical patent/JP2007512680A/ja
Publication of JP2007512680A5 publication Critical patent/JP2007512680A5/ja
Pending legal-status Critical Current

Links

JP2006523830A 2003-08-18 2004-06-10 薄膜トランジスタの封止方法 Pending JP2007512680A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/642,919 US20070178710A1 (en) 2003-08-18 2003-08-18 Method for sealing thin film transistors
PCT/US2004/018681 WO2005020343A1 (en) 2003-08-18 2004-06-10 Method for sealing thin film transistors

Publications (2)

Publication Number Publication Date
JP2007512680A JP2007512680A (ja) 2007-05-17
JP2007512680A5 true JP2007512680A5 (enExample) 2007-07-26

Family

ID=34216368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006523830A Pending JP2007512680A (ja) 2003-08-18 2004-06-10 薄膜トランジスタの封止方法

Country Status (6)

Country Link
US (1) US20070178710A1 (enExample)
EP (1) EP1656695A1 (enExample)
JP (1) JP2007512680A (enExample)
KR (1) KR20060079195A (enExample)
CN (1) CN1839491A (enExample)
WO (1) WO2005020343A1 (enExample)

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WO2010137664A1 (ja) * 2009-05-28 2010-12-02 帝人株式会社 アルキルシラン積層体及びその製造方法、並びに薄膜トランジスタ
WO2011034012A1 (en) * 2009-09-16 2011-03-24 Semiconductor Energy Laboratory Co., Ltd. Logic circuit, light emitting device, semiconductor device, and electronic device
KR101595470B1 (ko) * 2009-12-01 2016-02-18 엘지디스플레이 주식회사 유기발광 표시장치의 제조방법
KR20130129926A (ko) * 2010-10-07 2013-11-29 조지아 테크 리서치 코포레이션 전계효과 트랜지스터 및 그 제조 방법
US8875067B2 (en) * 2013-03-15 2014-10-28 Taiwan Semiconductor Manufacturing Co., Ltd. Reusable cut mask for multiple layers
KR102636749B1 (ko) * 2016-11-28 2024-02-14 엘지디스플레이 주식회사 유기발광소자를 이용한 조명장치 및 그 제조방법
CN106847741B (zh) * 2016-12-30 2019-11-22 深圳市华星光电技术有限公司 一种薄膜晶体管阵列基板制造方法、真空气相蒸发台及其控制方法
KR102271091B1 (ko) * 2020-03-04 2021-06-29 성균관대학교산학협력단 비휘발성 메모리 소자 및 이의 제조 방법
CN113241422B (zh) * 2021-06-17 2025-03-21 京东方科技集团股份有限公司 显示基板和显示装置

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