JP2007511069A - 共注入後の薄膜層のカタストロフィ的転写方法 - Google Patents
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- 239000010409 thin film Substances 0.000 title claims abstract description 32
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- 239000007924 injection Substances 0.000 title description 11
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- 238000010438 heat treatment Methods 0.000 claims description 27
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 25
- 239000013626 chemical specie Substances 0.000 claims description 22
- 239000000463 material Substances 0.000 claims description 20
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 18
- 229910052734 helium Inorganic materials 0.000 claims description 16
- 239000001307 helium Substances 0.000 claims description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 238000004299 exfoliation Methods 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 6
- 239000005350 fused silica glass Substances 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 4
- 239000012212 insulator Substances 0.000 claims description 4
- 229910013641 LiNbO 3 Inorganic materials 0.000 claims description 2
- 230000000977 initiatory effect Effects 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 239000010408 film Substances 0.000 abstract description 10
- 238000000926 separation method Methods 0.000 abstract 1
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- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910017214 AsGa Inorganic materials 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
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- 150000002431 hydrogen Chemical class 0.000 description 2
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 2
- 238000000678 plasma activation Methods 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- 229910003327 LiNbO3 Inorganic materials 0.000 description 1
- 229910012463 LiTaO3 Inorganic materials 0.000 description 1
- 229910008045 Si-Si Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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Abstract
Description
− 例えば、残りの部分の界面に比べて余りに低い局所的結合エネルギーと、転写を開始させる道具の挿入に関係する、王冠(crown)欠陥(最終製品の周辺部での、転写のないゾーン)、
− 特に機械的なアシストを受けるために間歇的で不規則な破断波による、後で研磨のような処理を必要とする(通常、これを避けようと努められる)、転写薄膜の厚さの一様性の欠如(低周波数の粗さ)、
− それぞれの構造体(またはウェハ)の個別の処理を必然的に伴う、破断の伝播を伴う道具の使用を仮定すると難しい工業的実施。
ソース基板を供用し、
前記ソース基板に、第1照射量のイオンまたは気体の第1化学種を、また第2照射量のイオンまたは気体の第2化学種を、前記ソース基板の表面に対して所定の深さに注入し、第1化学種は欠陥を生成し、第2化学種はこれらの欠陥を占めるようなものであり、
スティフナー(stiffener)を前記ソース基板に密接に接触させて付け、
薄膜の熱剥離を開始させないで、埋もれた弱化ゾーンを実質的に前記の所定の深さに生成させるように、所定の温度で所定の時間ソース基板に熱処理を行い、
前記表面と前記の埋もれた弱化層との間の画定された薄膜の、前記ソース基板の残りに部分に対する、カタストロフィ(全体的瞬間)的剥離を引き起こすように、局限された量のエネルギーを前記ソース基板に供給し、前記薄膜は、粗さが所定の限界値より少ない表面を、前記表面の反対側にもつ、
薄膜のカタストロフィ的転写方法を提供する。
・予備弱化アニーリングステップの作業ウィンドウが拡大される:予備弱化アニーリング継続時間の最大値の制限はもはや存在しない(あるいは、それはかなり付随的になる);これは本発明の方法の工業化にとって好ましい。
本発明の目的、特徴および利点は、添付図を参照しながら非限定的例示として記載される以下の説明から明らかになるであろう。
・元素周期表のIV族の別の半導体、例えばゲルマニウム、
・III−V族のタイプの半導体、例えば、特に、AsGaまたはInP、
・絶縁体、例えば、ニオブ酸塩またはタンタル酸塩タイプ、例えば、特に、LiNbO3もしくはLiTaO3。
・結晶性材料、例えばサファイア、
・溶融シリカまたは別のガラスの基板、
・単なるスティッフニング層、例えば、知られている適切な方法により堆積された数十ナノメートルの厚さの酸化物層(これは、もはや、図に示されているタイプの嵩のあるターゲット基板には明らかに相当しない)。
Claims (24)
- ソース基板を供用し、
前記ソース基板に、第1照射量のイオンまたは気体の第1化学種を、また第2照射量のイオンまたは気体の第2化学種を、前記ソース基板の表面に対して所定の深さに注入し、第1化学種は欠陥を生成し、第2化学種はこれらの欠陥を占めるようなものであり、
スティフナーを前記ソース基板に密接に接触させて付け、
薄膜の熱剥離を開始させないで、埋もれた弱化ゾーンを実質的に前記の所定の深さに生成させるように、所定の温度で所定の時間ソース基板に熱処理を行い、
前記表面と前記の埋もれた弱化層との間の画定された薄膜の、前記ソース基板の残りに部分に対する、カタストロフィ的剥離を引き起こすように、局限された量のエネルギーを前記ソース基板に供給し、前記薄膜は、粗さが所定の限界値より少ない表面を、前記表面の反対側にもつ、
薄膜のカタストロフィ的転写方法。 - 局限されたエネルギーの供給が、埋もれた弱化層の極一部にだけ行われることを特徴とする請求項1に記載の方法。
- 局限されたエネルギーの供給が、局限された熱の供給の形で行われることを特徴とする請求項2に記載の方法。
- 局限されたエネルギーの供給が、道具により加えられる短時間で僅かな振幅の動きの形で行われることを特徴とする請求項2に記載の方法。
- 局限されたエネルギーの供給が、埋もれた弱化層の周辺ゾーンにおいて衝撃の形で行われることを特徴とする請求項2に記載の方法。
- 少なくとも熱処理の時に、ソース基板に密接に接触させて置かれるスティフナーがターゲット基板であり、熱処理がこれらの基板の間の結合エネルギーを増大させるのに寄与することを特徴とする請求項1から5のいずれか一項に記載の方法。
- ターゲット基板がアモルファス材料基板であることを特徴とする請求項6に記載の方法。
- ソース基板がシリコン基板であり、ターゲット基板が溶融シリカ基板であることを特徴とする請求項6に記載の方法。
- ターゲット基板が単結晶または多結晶材料の基板であることを特徴とする請求項6に記載の方法。
- ターゲット基板がシリコン基板であることを特徴とする請求項9に記載の方法。
- 第1化学種の注入が、第2化学種の注入の後で実施されることを特徴とする請求項1から10のいずれか一項に記載の方法。
- ソース基板が、単結晶、多結晶またはアモルファスの半導体および絶縁体から選択される材料から供用されることを特徴とする請求項1から11のいずれか一項に記載の方法。
- ソース基板がIV族半導体から選択される材料から供用されることを特徴とする請求項12に記載の方法。
- ソース基板がシリコンからなることを特徴とする請求項13に記載の方法。
- 熱処理が200℃〜400℃の範囲において選択される温度で実施されることを特徴とする請求項1から14のいずれか一項に記載の方法。
- 熱処理が300℃〜350℃の範囲において選択される温度で実施されることを特徴とする請求項15に記載の方法。
- 熱処理が約2時間から5時間実施されることを特徴とする請求項15または請求項16に記載の方法。
- ソース基板がIII−V族タイプの半導体材料から供用されることを特徴とする請求項12に記載の方法。
- ソース基板が、LiNbO3およびLiTaO3からなる群から選択される絶縁体から供用されることを特徴とする請求項12に記載の方法。
- 第1化学種が水素であることを特徴とする請求項1から19のいずれか一項に記載の方法。
- 第1化学種がH+タイプの水素であることを特徴とする請求項20に記載の方法。
- 第1化学種が数1016H/cm2の照射量で注入されることを特徴とする請求項21に記載の方法。
- 第2化学種がヘリウムであることを特徴とする請求項1から22のいずれか一項に記載の方法。
- 第2化学種が、数1016He/cm2で、第1化学種の照射量より少ない照射量で注入されることを特徴とする請求項23に記載の方法。
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FR0312621A FR2861497B1 (fr) | 2003-10-28 | 2003-10-28 | Procede de transfert catastrophique d'une couche fine apres co-implantation |
FR0312621 | 2003-10-28 | ||
PCT/FR2004/002781 WO2005043616A1 (fr) | 2003-10-28 | 2004-10-28 | Procede de transfert catastrophique d'une couche fine apres co-implantation |
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JP2006537358A Active JP5244315B2 (ja) | 2003-10-28 | 2004-10-28 | 注入又は共注入後のパルスによる薄膜層の自立転写方法 |
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KR (2) | KR101120621B1 (ja) |
CN (2) | CN100474557C (ja) |
FR (1) | FR2861497B1 (ja) |
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Cited By (4)
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WO2008156056A1 (ja) * | 2007-06-18 | 2008-12-24 | Seiko Epson Corporation | シリコン基材の接合方法、液滴吐出ヘッド、液滴吐出装置および電子デバイス |
JP2008311596A (ja) * | 2007-06-18 | 2008-12-25 | Seiko Epson Corp | シリコン基材の接合方法、液滴吐出ヘッド、液滴吐出装置および電子デバイス |
JP2009023900A (ja) * | 2007-06-18 | 2009-02-05 | Seiko Epson Corp | シリコン基材の接合方法、液滴吐出ヘッド、液滴吐出装置および電子デバイス |
KR20150119822A (ko) * | 2014-04-16 | 2015-10-26 | 소이텍 | 유용층 이송방법 |
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FR2748851B1 (fr) | 1996-05-15 | 1998-08-07 | Commissariat Energie Atomique | Procede de realisation d'une couche mince de materiau semiconducteur |
FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
FR2848336B1 (fr) | 2002-12-09 | 2005-10-28 | Commissariat Energie Atomique | Procede de realisation d'une structure contrainte destinee a etre dissociee |
FR2856844B1 (fr) | 2003-06-24 | 2006-02-17 | Commissariat Energie Atomique | Circuit integre sur puce de hautes performances |
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JP2008311596A (ja) * | 2007-06-18 | 2008-12-25 | Seiko Epson Corp | シリコン基材の接合方法、液滴吐出ヘッド、液滴吐出装置および電子デバイス |
JP2009023900A (ja) * | 2007-06-18 | 2009-02-05 | Seiko Epson Corp | シリコン基材の接合方法、液滴吐出ヘッド、液滴吐出装置および電子デバイス |
KR20150119822A (ko) * | 2014-04-16 | 2015-10-26 | 소이텍 | 유용층 이송방법 |
JP2015213161A (ja) * | 2014-04-16 | 2015-11-26 | ソイテックSoitec | 有用層を移転するための方法 |
KR102333997B1 (ko) | 2014-04-16 | 2021-12-02 | 소이텍 | 유용층 이송방법 |
Also Published As
Publication number | Publication date |
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JP5244315B2 (ja) | 2013-07-24 |
KR20070051765A (ko) | 2007-05-18 |
TW200524010A (en) | 2005-07-16 |
FR2861497B1 (fr) | 2006-02-10 |
WO2005043616A1 (fr) | 2005-05-12 |
WO2005043615A1 (fr) | 2005-05-12 |
JP2007510298A (ja) | 2007-04-19 |
EP1678755B1 (fr) | 2012-10-17 |
EP1678755A1 (fr) | 2006-07-12 |
EP1678754B1 (fr) | 2015-07-15 |
FR2861497A1 (fr) | 2005-04-29 |
JP5142528B2 (ja) | 2013-02-13 |
EP1678754A1 (fr) | 2006-07-12 |
CN100474556C (zh) | 2009-04-01 |
TWI349303B (en) | 2011-09-21 |
KR101120621B1 (ko) | 2012-03-16 |
US8309431B2 (en) | 2012-11-13 |
CN1868053A (zh) | 2006-11-22 |
CN100474557C (zh) | 2009-04-01 |
KR20060122830A (ko) | 2006-11-30 |
US20070281445A1 (en) | 2007-12-06 |
CN1864256A (zh) | 2006-11-15 |
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