JP2007503717A - Ldmosトランジスタを有する電子装置 - Google Patents
Ldmosトランジスタを有する電子装置 Download PDFInfo
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- JP2007503717A JP2007503717A JP2006524515A JP2006524515A JP2007503717A JP 2007503717 A JP2007503717 A JP 2007503717A JP 2006524515 A JP2006524515 A JP 2006524515A JP 2006524515 A JP2006524515 A JP 2006524515A JP 2007503717 A JP2007503717 A JP 2007503717A
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- 239000002019 doping agent Substances 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims description 20
- 238000009826 distribution Methods 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 125000006850 spacer group Chemical group 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 229910021332 silicide Inorganic materials 0.000 claims description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 description 13
- 102100032937 CD40 ligand Human genes 0.000 description 12
- 101000868215 Homo sapiens CD40 ligand Proteins 0.000 description 12
- 230000000694 effects Effects 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000006731 degradation reaction Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (11)
- 半導体基板の表面に設けられるトランジスタを有する電子装置であって、前記トランジスタが、チャネルを介して相互に接続されるソース及びドレインを有し、前記トランジスタが、前記チャネルにおける電子分布の影響を及ぼすゲート電極と前記ゲート及び前記ドレイン間において存在するシールドとを更に具備し、前記ドレインが、前記基板において前記チャネルに向かって延在するドレイン延長部を具備し、前記ドレインが接触部を有し、前記ドレイン接触部及び前記ゲートが、延長領域を介して相互に分離される電子装置において、前記シールドが、前記延長部において段付き構造を有することを特徴とする電子装置。
- L型形状スペーサが、前記ゲート電極及び前記シールド間において存在する、請求項1に記載の電子装置。
- 前記シールドが、金属シリサイドとして形成される、請求項1及び2の何れか一項に記載の電子装置。
- 前記ドレイン延長部が、第1及び第2領域を具備し、前記第1領域が、前記チャネル及び前記第2領域との界面を有し、前記第2領域が、前記ドレイン内において接触領域との界面を有し、前記第1領域が、前記第2領域よりも高いドーパント濃度を有し、
前記第1領域が、前記基板において前記シールドの垂直投影によって規定されるシールド領域内に略存在する、請求項1及び2の何れか一項に記載の電子装置。 - 半導体基板の表面に設けられるトランジスタを有する電子装置であって、前記トランジスタが、チャネルを介して相互に接続されるソース及びドレインを有し、前記トランジスタが、前記チャネルにおける電子分布の影響を及ぼすゲート電極と前記ゲート及び前記ドレイン間において存在するシールドとを更に具備し、前記ドレインが、前記基板において前記チャネルに向かって延在するドレイン延長部を具備し、前記ドレインが接触部を有し、前記ドレイン接触部及び前記ゲートが、延長領域を介して相互に分離され、前記ドレイン延長部が、第1及び第2領域を具備し、前記第1領域が、前記チャネル及び前記第2領域との界面を有し、前記第2領域が、前記ドレイン内において接触領域との界面を有し、
前記第1領域が、前記第2領域より高いドーパント濃度を有し、前記第1領域が、前記基板における前記シールドの垂直投影によって規定されるシールド領域内において略存在する電子装置。 - 前記第1及び前記第2領域間における界面が、前記シールド領域内に存在する、請求項4及び5の何れか一項に記載の電子装置。
- 前記第1及び前記第2領域における前記ドーパント濃度の比率が、1.2から2.5の範囲にある、請求項4、5及び6の何れか一項に記載の電子装置。
- 前記シールドが、電気的接続を介して前記ソースに電気的に接続される、請求項1及び5の何れか一項に記載の電子装置。
- 前記電気的接続が、コンデンサを有する、請求項8に記載の電子装置。
- 前記半導体基板がシリコン製であり、前記トランジスタがLDMOSタイプである、請求項1及び5の何れか一項に記載の電子装置。
- 請求項1に記載の電子装置を製造する方法であって、
−ソース、ドレイン及びゲートを含むトランジスタであって、前記ドレインがドレイン延長部を具備するトランジスタを設けるステップと、
−前記ゲートの上にあり且つ前記ゲートに隣接する絶縁材料を設けるステップと、
−前記絶縁材料に金属蒸着によって段付きシールド構造を設けるステップと
を有する方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP03103233 | 2003-08-27 | ||
PCT/IB2004/051549 WO2005022645A2 (en) | 2003-08-27 | 2004-08-24 | Electronic device comprising an ldmos transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2007503717A true JP2007503717A (ja) | 2007-02-22 |
Family
ID=34259219
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006524515A Pending JP2007503717A (ja) | 2003-08-27 | 2004-08-24 | Ldmosトランジスタを有する電子装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7521768B2 (ja) |
EP (1) | EP1661186A2 (ja) |
JP (1) | JP2007503717A (ja) |
KR (1) | KR20060064659A (ja) |
CN (1) | CN100555661C (ja) |
TW (1) | TW200514258A (ja) |
WO (1) | WO2005022645A2 (ja) |
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WO2007007273A2 (en) * | 2005-07-13 | 2007-01-18 | Nxp B.V. | Ldmos transistor |
US7868378B1 (en) * | 2005-07-18 | 2011-01-11 | Volterra Semiconductor Corporation | Methods and apparatus for LDMOS transistors |
CN101238585A (zh) | 2005-08-10 | 2008-08-06 | Nxp股份有限公司 | Ldmos晶体管 |
TW200735361A (en) | 2005-12-14 | 2007-09-16 | Koninkl Philips Electronics Nv | MOS transistor and a method of manufacturing a MOS transistor |
KR20090009699A (ko) * | 2007-07-20 | 2009-01-23 | 삼성전자주식회사 | 커패시터가 없는 동적 메모리 셀을 구비한 반도체 메모리장치, 이 장치를 위한 동적 메모리 셀, 및 이 장치를구비한 메모리 시스템 |
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JP5732790B2 (ja) * | 2010-09-14 | 2015-06-10 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
CN102569381A (zh) * | 2010-12-07 | 2012-07-11 | 上海华虹Nec电子有限公司 | 具有屏蔽栅的ldmos结构及其制备方法 |
CN102569079B (zh) * | 2010-12-17 | 2014-12-10 | 上海华虹宏力半导体制造有限公司 | 具有自对准金属硅化工艺的双栅ldmos的制备方法 |
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CN103035678B (zh) * | 2012-06-08 | 2015-04-08 | 上海华虹宏力半导体制造有限公司 | Rf ldmos器件及制造方法 |
CN103050532B (zh) * | 2012-08-13 | 2015-04-08 | 上海华虹宏力半导体制造有限公司 | Rf ldmos器件及制造方法 |
CN103050531B (zh) * | 2012-08-13 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | Rf ldmos器件及制造方法 |
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2004
- 2004-08-24 WO PCT/IB2004/051549 patent/WO2005022645A2/en active Application Filing
- 2004-08-24 JP JP2006524515A patent/JP2007503717A/ja active Pending
- 2004-08-24 KR KR1020067003861A patent/KR20060064659A/ko not_active Application Discontinuation
- 2004-08-24 CN CNB2004800242999A patent/CN100555661C/zh not_active Expired - Fee Related
- 2004-08-24 US US10/569,171 patent/US7521768B2/en active Active
- 2004-08-24 EP EP04769844A patent/EP1661186A2/en not_active Withdrawn
- 2004-08-26 TW TW093125662A patent/TW200514258A/zh unknown
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JP2001274390A (ja) * | 2000-01-18 | 2001-10-05 | Fuji Electric Co Ltd | 高耐圧デバイスおよびその製造方法、不純物拡散領域の形成方法 |
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Publication number | Publication date |
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KR20060064659A (ko) | 2006-06-13 |
US20070007591A1 (en) | 2007-01-11 |
TW200514258A (en) | 2005-04-16 |
EP1661186A2 (en) | 2006-05-31 |
WO2005022645A2 (en) | 2005-03-10 |
US7521768B2 (en) | 2009-04-21 |
CN100555661C (zh) | 2009-10-28 |
CN1842918A (zh) | 2006-10-04 |
WO2005022645A3 (en) | 2005-05-06 |
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