JP2007502015A - マルチチップ回路モジュールおよびその製造法 - Google Patents
マルチチップ回路モジュールおよびその製造法 Download PDFInfo
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Abstract
【解決手段】 本発明は、メイン基板(9)と、メイン基板に取り付けられ且つメイン基板と電気的に接触されている少なくとも1つの担体基板(1)と、担体基板に設けられ且つ担体基板と電気的に接触された少なくとも1つの半導体チップ(5)とを具備するマルチチップ回路モジュールに関する。担体基板は少なくとも1つの半導体チップを受ける少なくとも1つのキャビティ−(4)を取リ付け面において有する。キャビティ−は、半導体チップに関連するバンプ(7)のための接続コンタクト(6)を有する。少なくとも1つの半導体チップはフリップチップ技術を用いてバンプによって接続コンタクトに載置されている。担体基板の取り付け面(3)はメイン基板の接触面(10)上に配置されている。充填材料(11)はメイン基板の接触面と担体基板の取り付け面との間に設けられている。
【選択図】 図3
Description
b)複数のキャビティ−に設けられた複数の接続コンタクトに載置されている、半導体チップのバンプと接触することによって、少なくとも1つの半導体チップをフリップチップ技術で取り付けること、
c)充填材料の層をメイン基板の接触面に付けること、
d)取り付け面を有する担体基板を、メイン基板の接触面に取り付けること。
Claims (11)
- メイン基板(9)と、前記メイン基板(9)に取り付けられており且つ前記メイン基板(9)と電気的に接触されている少なくとも1つの担体基板(1)と、前記担体基板(1)上に設けられており且つ前記担体基板(1)と電気的に接触されている少なくとも1つの半導体チップ(5)とを具備し、
前記担体基板(1)は、取り付け面に、少なくとも1つの半導体チップ(5)を受け入れるための少なくとも1つのキャビティ−(4)を有し、
前記キャビティ−(4)には、前記半導体チップ(5)の割り当てられたバンプ(7)のための接続コンタクト(6)が設けられており、
前記少なくとも1つの半導体チップ(5)は、フリップチップ技術で、前記バンプ(7)によって前記接続コンタクト(6)に取り付けられており、
前記担体基板(1)の前記取り付け面(3)は、前記メイン基板(9)の接触面(10)に付けられており、充填材料(11)は、前記メイン基板(9)の前記接触面(10)と、前記担体基板(1)の前記取り付け面(3)との間に設けられてなるマルチチップ回路モジュールにおいて、
前記担体基板(1)は多層であり、複数の層を横切って延びている複数の導電路(2)を有し、前記充填材料(11)は前記接続コンタクト(6)およびバンプ(7)を取り囲むことなく前記キャビティ−(4)内で前記半導体チップ(5)の裏面と接触することを特徴とするマルチチップ回路モジュール。 - 前記充填材料(11)は異方性導電材料であり、例えば、異方性導電ペーストまたは異方性導電フィルムであることを特徴とする請求項1に記載のマルチチップ回路モジュール。
- 前記充填材料(11)は、前記複数のキャビティ−(4)の中間空間を完全に充填しないことを特徴とする請求項1または2に記載のマルチチップ回路モジュール。
- 前記担体基板(1)の複数の導電路(2)は、前記取り付け面(3)へ延びており、信号送信、排熱、封入および遮蔽を互いに並行的に行なうために、前記メイン基板(9)の導電路(12)に電気的および機械的に接続されていることを特徴とする請求項1乃至3のいずれか1に記載のマルチチップ回路モジュール。
- 前記担体基板(1)の、前記取り付け面(3)と反対側にある下面上に設けられたプレーナ・アンテナ装置(8)を具備することを特徴とする請求項1乃至4のいずれか1に記載のマルチチップ回路モジュール。
- 前記担体基板(1)は、多層セラミックであり、特に低温共焼成セラミック(LTCC)であることを特徴とする請求項1乃至5のいずれか1に記載のマルチチップ回路モジュール。
- a)前記少なくとも1つの半導体チップ(5)を、これらの半導体チップ(3)のために前記担体基板(1)の取り付け面(3)に形成された複数のキャビティ−(4)へ入れることと、
b)前記複数のキャビティ−(4)に設けられた複数の接続コンタクト(6)に載置されている、前記半導体チップ(5)のバンプ(7)と接触させることによって、前記少なくとも1つの半導体チップ(5)をフリップチップ技術で取り付けることと、
c)前記充填材料の層(11)を前記メイン基板(9)の前記接触面(10)に付けることと、
d)前記取り付け面(3)を有する前記担体基板(1)を、前記メイン基板(9)の前記接触面(10)に取り付けることと、
を有する、請求項1乃至6のいずれか1に記載のマルチチップ回路モジュールの製造方法。 - 異方性導電充填材料(11)、特にペーストまたはフィルムを、前記充填材料(11)として、前記接触面に付けることを特徴とする請求項7に記載の方法。
- 前記充填材料層(11)を、前記キャビティ−(4)の中間空間が前記充填材料(11)で完全に充填されないほどに適切な層の厚さに付けることを特徴とする請求項7または8に記載の方法。
- 前記担体基板(1)の複数の層を横切って延び且つ前記取り付け面(3)へ延びている複数の導電路(2)を、前記メイン基板(9)の複数の導電路(12)と電気的に接続することを特徴とする請求項7乃至9のいずれか1に記載の方法。
- ガスを前記キャビティ−(4)に封入するためにガス雰囲気中で製造することを特徴とする請求項7乃至10のいずれか1に記載の方法。
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Application Number | Priority Date | Filing Date | Title |
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DE10336171A DE10336171B3 (de) | 2003-08-07 | 2003-08-07 | Multichip-Schaltungsmodul und Verfahren zur Herstellung hierzu |
PCT/DE2004/001576 WO2005015632A1 (de) | 2003-08-07 | 2004-07-20 | Multichip-schaltungsmodul und verfahren zur herstellung hierzu |
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JP2007502015A true JP2007502015A (ja) | 2007-02-01 |
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JP2006522216A Pending JP2007502015A (ja) | 2003-08-07 | 2004-07-20 | マルチチップ回路モジュールおよびその製造法 |
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US (1) | US7358604B2 (ja) |
EP (1) | EP1652232B1 (ja) |
JP (1) | JP2007502015A (ja) |
AT (1) | ATE377843T1 (ja) |
DE (2) | DE10336171B3 (ja) |
WO (1) | WO2005015632A1 (ja) |
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KR100718613B1 (ko) * | 2001-10-22 | 2007-05-16 | 애플 인크. | 호스트 컴퓨터와 미디어 플레이어의 미디어 내용 동기화 방법 |
US20030167318A1 (en) * | 2001-10-22 | 2003-09-04 | Apple Computer, Inc. | Intelligent synchronization of media player with host computer |
US11314378B2 (en) | 2005-01-07 | 2022-04-26 | Apple Inc. | Persistent group of media items for a media device |
US7928591B2 (en) * | 2005-02-11 | 2011-04-19 | Wintec Industries, Inc. | Apparatus and method for predetermined component placement to a target platform |
US20070187844A1 (en) | 2006-02-10 | 2007-08-16 | Wintec Industries, Inc. | Electronic assembly with detachable components |
US7864113B2 (en) * | 2005-03-31 | 2011-01-04 | Georgia Tech Research Corporation | Module, filter, and antenna technology for millimeter waves multi-gigabits wireless systems |
DE102006023123B4 (de) * | 2005-06-01 | 2011-01-13 | Infineon Technologies Ag | Abstandserfassungsradar für Fahrzeuge mit einem Halbleitermodul mit Komponenten für Höchstfrequenztechnik in Kunststoffgehäuse und Verfahren zur Herstellung eines Halbleitermoduls mit Komponenten für ein Abstandserfassungsradar für Fahrzeuge in einem Kunststoffgehäuse |
DE102005062344B4 (de) | 2005-12-23 | 2010-08-19 | Infineon Technologies Ag | Halbleiterbauteil für Hochfrequenzanwendungen und Verfahren zur Herstellung eines derartigen Halbleiterbauteils |
US20110222253A1 (en) * | 2006-02-10 | 2011-09-15 | Kong-Chen Chen | Electronic assembly with detachable components |
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Also Published As
Publication number | Publication date |
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EP1652232B1 (de) | 2007-11-07 |
DE502004005445D1 (de) | 2007-12-20 |
ATE377843T1 (de) | 2007-11-15 |
EP1652232A1 (de) | 2006-05-03 |
US20070013051A1 (en) | 2007-01-18 |
WO2005015632A1 (de) | 2005-02-17 |
DE10336171B3 (de) | 2005-02-10 |
US7358604B2 (en) | 2008-04-15 |
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