JP2007243183A - 抵抗性メモリ素子 - Google Patents
抵抗性メモリ素子 Download PDFInfo
- Publication number
- JP2007243183A JP2007243183A JP2007050627A JP2007050627A JP2007243183A JP 2007243183 A JP2007243183 A JP 2007243183A JP 2007050627 A JP2007050627 A JP 2007050627A JP 2007050627 A JP2007050627 A JP 2007050627A JP 2007243183 A JP2007243183 A JP 2007243183A
- Authority
- JP
- Japan
- Prior art keywords
- memory device
- resistive memory
- current control
- control layer
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 claims abstract description 12
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- 229910052723 transition metal Inorganic materials 0.000 claims description 4
- 229910000314 transition metal oxide Inorganic materials 0.000 claims description 4
- 150000003624 transition metals Chemical class 0.000 claims description 4
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 230000008859 change Effects 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 239000010408 film Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 229910003134 ZrOx Inorganic materials 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/32—Material having simple binary metal oxide structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/50—Resistive cell structure aspects
- G11C2213/56—Structure including two electrodes, a memory active layer and a so called passive or source or reservoir layer which is NOT an electrode, wherein the passive or source or reservoir layer is a source of ions which migrate afterwards in the memory active layer to be only trapped there, to form conductive filaments there or to react with the material of the memory active layer in redox way
Abstract
【解決手段】第1電極21と、第1電極21上に形成され、2つの抵抗状態を利用して情報を保存する第1酸化物層22と、第1酸化物層上に形成される第2酸化物材料からなる電流制御層23と、電流制御層23上に形成される第2電極24と、を備える。
【選択図】図2A
Description
Memory:以下、RRAMと称する)は、主に遷移金属酸化物の電圧によって抵抗値が変化する特性(抵抗変化特性)を利用したものであって、中央の酸化物層及び上下電極を備えた構造を有する。
ングされたZnOxもしくはRuOx、または、金属がドーピングされたSiO2もしくはZrリッチのZrO2から形成されうる。
を示すグラフである。
21 下部電極、
22 第1酸化物層、
23 電流制御層、
24 上部電極。
Claims (7)
- 第1電極と、
前記第1電極上に形成され、2つの抵抗状態を利用して情報を保存する第1酸化物層と、
前記第1酸化物層上に形成される第2酸化物材料からなる電流制御層と、
前記電流制御層上に形成される第2電極と、を備えることを特徴とする抵抗性メモリ素子。 - 前記第1酸化物層は、NiOx、ZrOx、Nb2O5−x、HfO、ZnO、WO3、CoO、CuO2、及びTiO2からなる群から選択された何れか1つから形成されることを特徴とする請求項1に記載の抵抗性メモリ素子。
- 前記電流制御層は、遷移金属がドーピングされたZnOxまたはRuOxから形成されることを特徴とする請求項1に記載の抵抗性メモリ素子。
- 前記電流制御層は、遷移金属酸化物から形成されることを特徴とする請求項1に記載の抵抗性メモリ素子。
- 前記電流制御層は、AlまたはInがドーピングされたZnOxまたはRuOxから形成されることを特徴とする請求項1に記載の抵抗性メモリ素子。
- 前記電流制御層は、金属がドーピングされたSiO2またはZrリッチのZrO2から形成されることを特徴とする請求項1に記載の抵抗性メモリ素子。
- 前記電流制御層は、10Ω〜10kΩの範囲の抵抗を有することを特徴とする請求項1〜請求項6の何れか1項に記載の抵抗性メモリ素子。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060022728A KR101176543B1 (ko) | 2006-03-10 | 2006-03-10 | 저항성 메모리소자 |
KR10-2006-0022728 | 2006-03-10 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007243183A true JP2007243183A (ja) | 2007-09-20 |
JP5230955B2 JP5230955B2 (ja) | 2013-07-10 |
Family
ID=38516928
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007050627A Active JP5230955B2 (ja) | 2006-03-10 | 2007-02-28 | 抵抗性メモリ素子 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8009454B2 (ja) |
JP (1) | JP5230955B2 (ja) |
KR (1) | KR101176543B1 (ja) |
CN (1) | CN101034732B (ja) |
Cited By (4)
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WO2009142165A1 (ja) * | 2008-05-20 | 2009-11-26 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US8269205B2 (en) | 2008-04-01 | 2012-09-18 | Kabushiki Kaisha Toshiba | Information recording and reproducing device |
JP5407864B2 (ja) * | 2007-09-18 | 2014-02-05 | 日本電気株式会社 | 抵抗変化素子および半導体記憶装置 |
US8916846B2 (en) | 2012-09-05 | 2014-12-23 | Kabushiki Kaisha Toshiba | Nonvolatile memory device |
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TWI402980B (zh) * | 2007-07-20 | 2013-07-21 | Macronix Int Co Ltd | 具有緩衝層之電阻式記憶結構 |
US7790497B2 (en) * | 2007-12-20 | 2010-09-07 | Spansion Llc | Method to prevent alloy formation when forming layered metal oxides by metal oxidation |
US7768812B2 (en) | 2008-01-15 | 2010-08-03 | Micron Technology, Inc. | Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices |
US8034655B2 (en) | 2008-04-08 | 2011-10-11 | Micron Technology, Inc. | Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays |
US8211743B2 (en) | 2008-05-02 | 2012-07-03 | Micron Technology, Inc. | Methods of forming non-volatile memory cells having multi-resistive state material between conductive electrodes |
US8134865B2 (en) * | 2008-05-06 | 2012-03-13 | Macronix International Co., Ltd. | Operating method of electrical pulse voltage for RRAM application |
US20100188884A1 (en) * | 2008-05-08 | 2010-07-29 | Satoru Mitani | Nonvolatile memory element, nonvolatile memory apparatus, and method of writing data to nonvolatile memory element |
JP5244454B2 (ja) | 2008-05-19 | 2013-07-24 | 株式会社東芝 | 不揮発性記憶装置及びその製造方法 |
US8134137B2 (en) | 2008-06-18 | 2012-03-13 | Micron Technology, Inc. | Memory device constructions, memory cell forming methods, and semiconductor construction forming methods |
US9343665B2 (en) | 2008-07-02 | 2016-05-17 | Micron Technology, Inc. | Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array |
KR100983175B1 (ko) * | 2008-07-03 | 2010-09-20 | 광주과학기술원 | 산화물막과 고체 전해질막을 구비하는 저항 변화 메모리소자, 및 이의 동작방법 |
US9385314B2 (en) | 2008-08-12 | 2016-07-05 | Industrial Technology Research Institute | Memory cell of resistive random access memory and manufacturing method thereof |
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KR100965772B1 (ko) * | 2008-08-13 | 2010-06-24 | 주식회사 하이닉스반도체 | 저항성 메모리 소자 및 그 제조 방법 |
KR20100062570A (ko) * | 2008-12-02 | 2010-06-10 | 삼성전자주식회사 | 저항성 메모리 소자 |
CN101958335B (zh) * | 2009-07-16 | 2013-05-29 | 中芯国际集成电路制造(上海)有限公司 | 相变随机存取存储器及制造方法、编程方法 |
KR101133707B1 (ko) | 2009-09-02 | 2012-04-13 | 에스케이하이닉스 주식회사 | 저항성 메모리 장치 및 그 제조방법 |
JPWO2011043448A1 (ja) * | 2009-10-09 | 2013-03-04 | 日本電気株式会社 | 半導体装置及びその製造方法 |
KR101055748B1 (ko) | 2009-10-23 | 2011-08-11 | 주식회사 하이닉스반도체 | 저항 변화 장치 및 그 제조방법 |
US8411477B2 (en) | 2010-04-22 | 2013-04-02 | Micron Technology, Inc. | Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells |
US8427859B2 (en) | 2010-04-22 | 2013-04-23 | Micron Technology, Inc. | Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells |
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JP5230955B2 (ja) | 2013-07-10 |
CN101034732A (zh) | 2007-09-12 |
KR20070092502A (ko) | 2007-09-13 |
KR101176543B1 (ko) | 2012-08-28 |
CN101034732B (zh) | 2011-06-01 |
US20070215977A1 (en) | 2007-09-20 |
US8009454B2 (en) | 2011-08-30 |
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