JP2007004876A - 強誘電体メモリ装置及び表示用駆動ic - Google Patents
強誘電体メモリ装置及び表示用駆動ic Download PDFInfo
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- JP2007004876A JP2007004876A JP2005182619A JP2005182619A JP2007004876A JP 2007004876 A JP2007004876 A JP 2007004876A JP 2005182619 A JP2005182619 A JP 2005182619A JP 2005182619 A JP2005182619 A JP 2005182619A JP 2007004876 A JP2007004876 A JP 2007004876A
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- Prior art keywords
- bit line
- memory cell
- data
- sense amplifier
- memory device
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- 101000575029 Bacillus subtilis (strain 168) 50S ribosomal protein L11 Proteins 0.000 description 24
- 102100035793 CD83 antigen Human genes 0.000 description 24
- 101000946856 Homo sapiens CD83 antigen Proteins 0.000 description 24
- 239000003990 capacitor Substances 0.000 description 14
- 238000003491 array Methods 0.000 description 9
- 101000949825 Homo sapiens Meiotic recombination protein DMC1/LIM15 homolog Proteins 0.000 description 4
- 101001046894 Homo sapiens Protein HID1 Proteins 0.000 description 4
- 102100022877 Protein HID1 Human genes 0.000 description 4
- 102100036966 Dipeptidyl aminopeptidase-like protein 6 Human genes 0.000 description 3
- 101000804935 Homo sapiens Dipeptidyl aminopeptidase-like protein 6 Proteins 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 101000967820 Homo sapiens Inactive dipeptidyl peptidase 10 Proteins 0.000 description 2
- 102100040449 Inactive dipeptidyl peptidase 10 Human genes 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2273—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/221—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using ferroelectric capacitors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2253—Address circuits or decoders
- G11C11/2257—Word-line or row circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/14—Dummy cell management; Sense reference voltage generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
【解決手段】
第1の方向に延びる第1のビット線と、第1のビット線に接続され、所定のデータを記憶する複数の第1のメモリセルと、第1の方向と略反対方向である第2の方向に延びる第2のビット線と、第2のビット線に接続され、所定のデータを記憶する複数の第2のメモリセルと、第1のビット線の一方端及び第2のビット線の一方端に接続され、第1のメモリセル及び第2のメモリセルに記憶されたデータを増幅するセンスアンプと、第1のビット線の他方端に接続され、センスアンプが増幅したデータをラッチするラッチ回路と、第1のメモリセル及び第2のメモリセルに記憶させるデータを伝送するデータバスと、第2のビット線の他方端に接続され、第2のビット線とデータバスとを接続するか否かを切り換える第1のスイッチと、を備えたことを特徴とする強誘電体メモリ装置。
【選択図】 図1
Description
よって、本発明は、上記の課題を解決することのできる強誘電体メモリ装置及び表示用駆動ICを提供することを目的とする。この目的は特許請求の範囲における独立項に記載の特徴の組み合わせにより達成される。また従属項は本発明の更なる有利な具体例を規定する。
Claims (4)
- 一方端から他方端に向かって第1の方向に延びる第1のビット線と、
前記第1のビット線に接続され、所定のデータを記憶する複数の第1のメモリセルと、
一方端から他方端に向かって前記第1の方向と略反対方向である第2の方向に延びる第2のビット線と、
前記第2のビット線に接続され、所定のデータを記憶する複数の第2のメモリセルと、
前記第1のビット線の一方端及び前記第2のビット線の一方端に接続され、前記第1のメモリセル及び前記第2のメモリセルに記憶されたデータを増幅するセンスアンプと、
前記第1のビット線の他方端に接続され、前記センスアンプが増幅したデータをラッチするラッチ回路と、
前記第1のメモリセル及び前記第2のメモリセルに記憶させるデータを伝送するデータバスと、
前記第2のビット線の他方端に接続され、前記第2のビット線と前記データバスとを接続するか否かを切り換える第1のスイッチと、
を備えたことを特徴とする強誘電体メモリ装置。 - 前記センスアンプと前記第1のメモリセルとの間において、前記第1のビット線に接続された第1のダミーセルと、
前記センスアンプと前記第2のメモリセルとの間において、前記第2のビット線に接続された第2のダミーセルと、
をさらに備え、
前記センスアンプは、前記第2のダミーセルを基準として前記第1のメモリセルに記憶されたデータを増幅し、前記第1のダミーセルを基準として前記第2のメモリセルに記憶されたデータを増幅することを特徴とする請求項1記載の強誘電体メモリ装置。 - 前記第1のビット線と前記ラッチ回路との間に設けられた第2のスイッチを更に備え、
前記第1のスイッチは、前記センスアンプが前記第1のメモリセルに記憶されたデータを増幅するときにオンし、
前記第2のスイッチは、前記センスアンプが前記第2のメモリセルに記憶されたデータを増幅するときにオンすることを特徴とする請求項1又は2記載の強誘電体メモリ装置。 - 請求項1から3のいずれか1項記載の強誘電体メモリ装置を備えたことを特徴とする表示用駆動IC。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005182619A JP4147536B2 (ja) | 2005-06-22 | 2005-06-22 | 強誘電体メモリ装置及び表示用駆動ic |
JP2006041441A JP4706846B2 (ja) | 2005-06-22 | 2006-02-17 | 強誘電体メモリ装置及び表示用駆動ic |
US11/445,411 US7366005B2 (en) | 2005-06-22 | 2006-06-01 | Ferroelectric memory device and display-driving IC |
KR1020060053052A KR100805998B1 (ko) | 2005-06-22 | 2006-06-13 | 강유전체 메모리 장치 및 표시용 구동 집적회로 |
CNA2006100828934A CN1885428A (zh) | 2005-06-22 | 2006-06-19 | 铁电存储装置 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005182619A JP4147536B2 (ja) | 2005-06-22 | 2005-06-22 | 強誘電体メモリ装置及び表示用駆動ic |
JP2006041441A JP4706846B2 (ja) | 2005-06-22 | 2006-02-17 | 強誘電体メモリ装置及び表示用駆動ic |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007004876A true JP2007004876A (ja) | 2007-01-11 |
JP4147536B2 JP4147536B2 (ja) | 2008-09-10 |
Family
ID=37567142
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005182619A Expired - Fee Related JP4147536B2 (ja) | 2005-06-22 | 2005-06-22 | 強誘電体メモリ装置及び表示用駆動ic |
JP2006041441A Expired - Fee Related JP4706846B2 (ja) | 2005-06-22 | 2006-02-17 | 強誘電体メモリ装置及び表示用駆動ic |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006041441A Expired - Fee Related JP4706846B2 (ja) | 2005-06-22 | 2006-02-17 | 強誘電体メモリ装置及び表示用駆動ic |
Country Status (4)
Country | Link |
---|---|
US (1) | US7366005B2 (ja) |
JP (2) | JP4147536B2 (ja) |
KR (1) | KR100805998B1 (ja) |
CN (1) | CN1885428A (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010157289A (ja) * | 2008-12-26 | 2010-07-15 | Elpida Memory Inc | 半導体記憶装置 |
JP6029434B2 (ja) | 2012-11-27 | 2016-11-24 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
US10403347B2 (en) * | 2018-01-29 | 2019-09-03 | Micron Technology, Inc. | Apparatuses and methods for accessing ferroelectric memory including providing reference voltage level |
CN117352023A (zh) * | 2022-06-27 | 2024-01-05 | 华为技术有限公司 | 一种铁电存储器、铁电存储器的读出电路及读出方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04283490A (ja) * | 1991-03-11 | 1992-10-08 | Oki Electric Ind Co Ltd | 半導体記憶装置 |
JPH06203552A (ja) * | 1991-11-18 | 1994-07-22 | Toshiba Corp | ダイナミック型半導体記憶装置 |
JP3302796B2 (ja) * | 1992-09-22 | 2002-07-15 | 株式会社東芝 | 半導体記憶装置 |
JP3096362B2 (ja) * | 1992-10-26 | 2000-10-10 | 沖電気工業株式会社 | シリアルアクセスメモリ |
JPH097377A (ja) * | 1995-06-20 | 1997-01-10 | Sony Corp | 強誘電体記憶装置 |
KR100323989B1 (ko) | 1996-08-22 | 2002-04-22 | 윤종용 | 강유전체반도체메모리용셀어레이구조및데이터감지방법 |
US5844832A (en) | 1996-08-22 | 1998-12-01 | Samsung Electronics Co., Ltd. | Cell array structure for a ferroelectric semiconductor memory and a method for sensing data from the same |
US5852571A (en) | 1997-03-14 | 1998-12-22 | Micron Technology, Inc. | Nonvolatile ferroelectric memory with folded bit line architecture |
KR100303056B1 (ko) * | 1998-11-07 | 2001-11-22 | 윤종용 | 온-칩테스트회로를구비한강유전체메모리장치 |
KR100463599B1 (ko) * | 2001-11-17 | 2004-12-29 | 주식회사 하이닉스반도체 | 불휘발성 강유전체 메모리 장치 및 그의 구동방법 |
JP3770171B2 (ja) | 2002-02-01 | 2006-04-26 | ソニー株式会社 | メモリ装置およびそれを用いたメモリシステム |
US6574135B1 (en) * | 2002-04-19 | 2003-06-03 | Texas Instruments Incorporated | Shared sense amplifier for ferro-electric memory cell |
JP3800179B2 (ja) | 2003-01-17 | 2006-07-26 | セイコーエプソン株式会社 | 強誘電体記憶装置及び表示用駆動ic |
JP2006024263A (ja) * | 2004-07-07 | 2006-01-26 | Seiko Epson Corp | 強誘電体記憶装置、電子機器 |
-
2005
- 2005-06-22 JP JP2005182619A patent/JP4147536B2/ja not_active Expired - Fee Related
-
2006
- 2006-02-17 JP JP2006041441A patent/JP4706846B2/ja not_active Expired - Fee Related
- 2006-06-01 US US11/445,411 patent/US7366005B2/en not_active Expired - Fee Related
- 2006-06-13 KR KR1020060053052A patent/KR100805998B1/ko not_active IP Right Cessation
- 2006-06-19 CN CNA2006100828934A patent/CN1885428A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
JP4147536B2 (ja) | 2008-09-10 |
JP4706846B2 (ja) | 2011-06-22 |
KR20060134803A (ko) | 2006-12-28 |
JP2007220245A (ja) | 2007-08-30 |
KR100805998B1 (ko) | 2008-02-26 |
US20060291270A1 (en) | 2006-12-28 |
US7366005B2 (en) | 2008-04-29 |
CN1885428A (zh) | 2006-12-27 |
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