JP2006523360A5 - - Google Patents

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Publication number
JP2006523360A5
JP2006523360A5 JP2006509807A JP2006509807A JP2006523360A5 JP 2006523360 A5 JP2006523360 A5 JP 2006523360A5 JP 2006509807 A JP2006509807 A JP 2006509807A JP 2006509807 A JP2006509807 A JP 2006509807A JP 2006523360 A5 JP2006523360 A5 JP 2006523360A5
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JP
Japan
Prior art keywords
memory cells
coupled
data signal
bit line
line
Prior art date
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Granted
Application number
JP2006509807A
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English (en)
Japanese (ja)
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JP2006523360A (ja
JP4504364B2 (ja
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Priority claimed from US10/412,490 external-priority patent/US6862208B2/en
Application filed filed Critical
Publication of JP2006523360A publication Critical patent/JP2006523360A/ja
Publication of JP2006523360A5 publication Critical patent/JP2006523360A5/ja
Application granted granted Critical
Publication of JP4504364B2 publication Critical patent/JP4504364B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2006509807A 2003-04-11 2004-04-08 センス・アンプおよびセルフタイム式ラッチを備えるメモリ装置 Expired - Fee Related JP4504364B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/412,490 US6862208B2 (en) 2003-04-11 2003-04-11 Memory device with sense amplifier and self-timed latch
PCT/US2004/010812 WO2004093139A2 (en) 2003-04-11 2004-04-08 Memory device with sense amplifier and self-timed latch

Publications (3)

Publication Number Publication Date
JP2006523360A JP2006523360A (ja) 2006-10-12
JP2006523360A5 true JP2006523360A5 (enExample) 2007-06-07
JP4504364B2 JP4504364B2 (ja) 2010-07-14

Family

ID=33131222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006509807A Expired - Fee Related JP4504364B2 (ja) 2003-04-11 2004-04-08 センス・アンプおよびセルフタイム式ラッチを備えるメモリ装置

Country Status (6)

Country Link
US (1) US6862208B2 (enExample)
JP (1) JP4504364B2 (enExample)
KR (1) KR101060037B1 (enExample)
CN (1) CN1774766B (enExample)
TW (1) TWI333209B (enExample)
WO (1) WO2004093139A2 (enExample)

Families Citing this family (30)

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Publication number Priority date Publication date Assignee Title
US6757202B2 (en) * 2002-08-29 2004-06-29 Micron Technology, Inc. Bias sensing in DRAM sense amplifiers
US7042776B2 (en) * 2004-02-18 2006-05-09 International Business Machines Corporation Method and circuit for dynamic read margin control of a memory array
US6967861B2 (en) * 2004-02-27 2005-11-22 International Business Machines Corporation Method and apparatus for improving cycle time in a quad data rate SRAM device
JP2007115362A (ja) * 2005-10-21 2007-05-10 Nec Electronics Corp 半導体記憶装置
US7313040B2 (en) * 2005-10-28 2007-12-25 Sony Corporation Dynamic sense amplifier for SRAM
JP4810350B2 (ja) * 2006-08-14 2011-11-09 株式会社東芝 半導体記憶装置
CN101118780B (zh) * 2007-09-18 2010-09-08 钰创科技股份有限公司 一种具有感测放大器的闩锁器
AU2009346782A1 (en) * 2009-05-29 2011-12-15 El-Forest Ab Hybrid utility vehicle
US8593896B2 (en) * 2011-03-30 2013-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Differential read write back sense amplifier circuits and methods
US8604838B2 (en) * 2011-12-12 2013-12-10 Texas Instruments Incorporated Comparator with improved time constant
KR102076602B1 (ko) 2013-02-19 2020-02-13 삼성전자주식회사 센스앰프회로 및 반도체 메모리 장치
CN104036812B (zh) * 2013-03-04 2017-04-12 德克萨斯仪器股份有限公司 具有改进的时间常数的比较器
WO2015079608A1 (ja) * 2013-11-27 2015-06-04 株式会社ソシオネクスト 半導体記憶装置
JP2016062618A (ja) * 2014-09-12 2016-04-25 株式会社東芝 半導体記憶装置
TWI537975B (zh) * 2014-11-27 2016-06-11 常憶科技股份有限公司 自我時序差動放大器
US9281041B1 (en) 2014-12-16 2016-03-08 Honeywell International Inc. Delay-based read system for a magnetoresistive random access memory (MRAM) bit
US9548089B2 (en) * 2015-04-01 2017-01-17 Qualcomm Incorporated Pipelining an asynchronous memory reusing a sense amp and an output latch
US9881687B2 (en) * 2015-12-18 2018-01-30 Texas Instruments Incorporated Self-latch sense timing in a one-time-programmable memory architecture
CN105976859B (zh) * 2016-05-20 2019-05-17 西安紫光国芯半导体有限公司 一种超低写功耗的静态随机存储器写操作的控制方法
KR102548599B1 (ko) * 2016-06-17 2023-06-29 삼성전자주식회사 버퍼메모리를 포함하는 메모리 장치 및 이를 포함하는 메모리 모듈
FR3055735B1 (fr) * 2016-09-07 2018-09-28 Commissariat A L'energie Atomique Et Aux Energies Alternatives Amplificateur de detection apte a controler une operation de lecture dans une memoire
US9997212B1 (en) * 2017-04-24 2018-06-12 Micron Technology, Inc. Accessing data in memory
US10170164B1 (en) * 2018-02-13 2019-01-01 Globalfoundries Inc. Sense amplifier latch circuit and sense amplifier multiplexed latch circuit
US10290340B1 (en) * 2018-03-29 2019-05-14 Qualcomm Technologies, Incorporated Offset-canceling (OC) write operation sensing circuits for sensing switching in a magneto-resistive random access memory (MRAM) bit cell in an MRAM for a write operation
TWI693766B (zh) 2018-04-18 2020-05-11 力旺電子股份有限公司 靜電放電防護裝置
KR102562118B1 (ko) * 2018-06-26 2023-08-02 에스케이하이닉스 주식회사 신호 수신 회로
US10923185B2 (en) * 2019-06-04 2021-02-16 Qualcomm Incorporated SRAM with burst mode operation
US11328752B2 (en) * 2020-05-20 2022-05-10 Silicon Storage Technology, Inc. Self-timed sensing architecture for a non-volatile memory system
CN113674777B (zh) * 2021-10-21 2022-03-15 北京紫光青藤微系统有限公司 数据存储装置和用于调用存储数据的方法
KR102754466B1 (ko) * 2022-12-30 2025-01-13 성균관대학교산학협력단 비휘발성 메모리용 의사-차동 고속 감지 스킴

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US5267197A (en) * 1990-12-13 1993-11-30 Sgs-Thomson Microelectronics, Inc. Read/write memory having an improved write driver
KR0177776B1 (ko) * 1995-08-23 1999-04-15 김광호 고집적 반도체 메모리 장치의 데이타 센싱회로
JP3169819B2 (ja) * 1996-02-28 2001-05-28 日本電気アイシーマイコンシステム株式会社 半導体記憶装置
JPH09284100A (ja) * 1996-04-19 1997-10-31 Hitachi Ltd レジスタ回路
JP2978813B2 (ja) * 1997-02-27 1999-11-15 日本電気アイシーマイコンシステム株式会社 半導体記憶回路
US6101145A (en) 1998-12-21 2000-08-08 Motorola, Inc. Sensing circuit and method
JP2001229670A (ja) * 2000-02-15 2001-08-24 Mitsubishi Electric Corp 半導体記憶装置

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