FR3055735B1 - Amplificateur de detection apte a controler une operation de lecture dans une memoire - Google Patents

Amplificateur de detection apte a controler une operation de lecture dans une memoire Download PDF

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Publication number
FR3055735B1
FR3055735B1 FR1658292A FR1658292A FR3055735B1 FR 3055735 B1 FR3055735 B1 FR 3055735B1 FR 1658292 A FR1658292 A FR 1658292A FR 1658292 A FR1658292 A FR 1658292A FR 3055735 B1 FR3055735 B1 FR 3055735B1
Authority
FR
France
Prior art keywords
memory
controlling
play operation
detection amplifier
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1658292A
Other languages
English (en)
Other versions
FR3055735A1 (fr
Inventor
Navneet Gupta
Adam Makosiej
Amara Amara
Costin Anghel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1658292A priority Critical patent/FR3055735B1/fr
Publication of FR3055735A1 publication Critical patent/FR3055735A1/fr
Application granted granted Critical
Publication of FR3055735B1 publication Critical patent/FR3055735B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
FR1658292A 2016-09-07 2016-09-07 Amplificateur de detection apte a controler une operation de lecture dans une memoire Active FR3055735B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR1658292A FR3055735B1 (fr) 2016-09-07 2016-09-07 Amplificateur de detection apte a controler une operation de lecture dans une memoire

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1658292A FR3055735B1 (fr) 2016-09-07 2016-09-07 Amplificateur de detection apte a controler une operation de lecture dans une memoire
FR1658292 2016-09-07

Publications (2)

Publication Number Publication Date
FR3055735A1 FR3055735A1 (fr) 2018-03-09
FR3055735B1 true FR3055735B1 (fr) 2018-09-28

Family

ID=57485653

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1658292A Active FR3055735B1 (fr) 2016-09-07 2016-09-07 Amplificateur de detection apte a controler une operation de lecture dans une memoire

Country Status (1)

Country Link
FR (1) FR3055735B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10768856B1 (en) * 2018-03-12 2020-09-08 Amazon Technologies, Inc. Memory access for multiple circuit components

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3169819B2 (ja) * 1996-02-28 2001-05-28 日本電気アイシーマイコンシステム株式会社 半導体記憶装置
KR20040065584A (ko) * 2003-01-15 2004-07-23 삼성전자주식회사 반도체 메모리의 데이터신호 증폭장치 및 그 증폭방법
US6862208B2 (en) * 2003-04-11 2005-03-01 Freescale Semiconductor, Inc. Memory device with sense amplifier and self-timed latch
US8737144B2 (en) * 2011-12-29 2014-05-27 Stmicroelectronics International N.V. Memory architecture and design methodology with adaptive read

Also Published As

Publication number Publication date
FR3055735A1 (fr) 2018-03-09

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