JP2006502557A - ボール状のグリッドアレイｘ線方位マーク - Google Patents

ボール状のグリッドアレイｘ線方位マーク Download PDF

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Publication number
JP2006502557A
JP2006502557A JP2003541052A JP2003541052A JP2006502557A JP 2006502557 A JP2006502557 A JP 2006502557A JP 2003541052 A JP2003541052 A JP 2003541052A JP 2003541052 A JP2003541052 A JP 2003541052A JP 2006502557 A JP2006502557 A JP 2006502557A
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JP
Japan
Prior art keywords
electronic component
ray
integration
manufacturing process
orientation indicator
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Pending
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JP2003541052A
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English (en)
Japanese (ja)
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JP2006502557A5 (enExample
Inventor
プリムローズ、ポール・ダブリュ
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Qualcomm Inc
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Qualcomm Inc
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Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of JP2006502557A publication Critical patent/JP2006502557A/ja
Publication of JP2006502557A5 publication Critical patent/JP2006502557A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54406—Marks applied to semiconductor devices or parts comprising alphanumeric information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448—Located on chip prior to dicing and remaining on chip after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0613—Square or rectangular array
    • H01L2224/06131—Square or rectangular array being uniform, i.e. having a uniform pitch across the array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/168—Wrong mounting prevention
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
JP2003541052A 2001-10-30 2002-10-29 ボール状のグリッドアレイｘ線方位マーク Pending JP2006502557A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/016,288 US6563905B1 (en) 2001-10-30 2001-10-30 Ball grid array X-ray orientation mark
PCT/US2002/034809 WO2003038896A2 (en) 2001-10-30 2002-10-29 Ball grid array with x-ray alignment mark

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2009256294A Division JP2010103543A (ja) 2001-10-30 2009-11-09 ボールグリッドアレイｘ線方位マーク

Publications (2)

Publication Number Publication Date
JP2006502557A true JP2006502557A (ja) 2006-01-19
JP2006502557A5 JP2006502557A5 (enExample) 2009-03-19

Family

ID=21776350

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2003541052A Pending JP2006502557A (ja) 2001-10-30 2002-10-29 ボール状のグリッドアレイｘ線方位マーク
JP2009256294A Pending JP2010103543A (ja) 2001-10-30 2009-11-09 ボールグリッドアレイｘ線方位マーク

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2009256294A Pending JP2010103543A (ja) 2001-10-30 2009-11-09 ボールグリッドアレイｘ線方位マーク

Country Status (9)

Country Link
US (2) US6563905B1 (enExample)
EP (1) EP1440471A2 (enExample)
JP (2) JP2006502557A (enExample)
CN (1) CN100375281C (enExample)
AU (1) AU2002342218A1 (enExample)
BR (1) BR0206243A (enExample)
CA (1) CA2433488A1 (enExample)
IL (2) IL156724A0 (enExample)
WO (1) WO2003038896A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014155455A1 (ja) * 2013-03-26 2014-10-02 日本特殊陶業株式会社 配線基板

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7027070B2 (en) * 2001-11-29 2006-04-11 Agilent Technologies, Inc. Systems and methods for manipulating a graphical display of a printed circuit board model for an automated x-ray inspection system
US7386376B2 (en) 2002-01-25 2008-06-10 Intelligent Mechatronic Systems, Inc. Vehicle visual and non-visual data recording system
US7529336B2 (en) 2007-05-31 2009-05-05 Test Research, Inc. System and method for laminography inspection
US7989229B2 (en) * 2007-09-10 2011-08-02 International Business Machines Corporation Tactile surface inspection during device fabrication or assembly
JP5493360B2 (ja) * 2009-01-08 2014-05-14 オムロン株式会社 Ｘ線検査方法、ｘ線検査装置およびｘ線検査プログラム
CN109196339B (zh) * 2016-04-04 2021-06-29 索雷克核研究中心 电子系统、验证电子系统的部件的兼容性的方法
US11029267B2 (en) * 2016-04-04 2021-06-08 Security Matters Ltd. Method and a system for XRF marking and reading XRF marks of electronic systems

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10226A (ja) * 1996-04-15 1998-01-06 Mitsugi Sugiyama Ｘ線により識別可能なプレス・スルー・パッケージ包装
JPH1074802A (ja) * 1996-08-30 1998-03-17 Shimu:Kk ボールグリッドアレイパッケージの接続構造及びその接続検査方法
JPH10199921A (ja) * 1997-01-09 1998-07-31 Hitachi Ltd 位置認識用マーク付半導体装置
JPH10284812A (ja) * 1997-04-08 1998-10-23 Mitsubishi Electric Corp 半導体デバイス
JPH11191575A (ja) * 1997-12-25 1999-07-13 Shinkawa Ltd フリップチップボンディング用部品、フリップチップボンディング確認用部品及びフリップチップボンディング方法

Family Cites Families (10)

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Publication number Priority date Publication date Assignee Title
US4926452A (en) * 1987-10-30 1990-05-15 Four Pi Systems Corporation Automated laminography system for inspection of electronics
GB8806232D0 (en) * 1988-03-16 1988-04-13 Plessey Co Plc Vernier structure for flip chip bonded devices
JP3457348B2 (ja) * 1993-01-15 2003-10-14 株式会社東芝 半導体装置の製造方法
US5465152A (en) * 1994-06-03 1995-11-07 Robotic Vision Systems, Inc. Method for coplanarity inspection of package or substrate warpage for ball grid arrays, column arrays, and similar structures
DE59809216D1 (de) * 1997-05-05 2003-09-11 Macrotron Process Technologies Verfahren und schaltungsanordnung zur prüfung von lötstellen
JP3929178B2 (ja) * 1998-07-30 2007-06-13 シチズン時計株式会社 Ｉｃ実装構造
GB2344550A (en) * 1998-12-09 2000-06-14 Ibm Pad design for electronic package
US6272204B1 (en) * 1999-02-23 2001-08-07 Cr Technology, Inc. Integrated X-ray and visual inspection systems
US6577019B1 (en) * 2000-01-21 2003-06-10 Micron Technology, Inc. Alignment and orientation features for a semiconductor package
US6617702B2 (en) * 2001-01-25 2003-09-09 Ibm Corporation Semiconductor device utilizing alignment marks for globally aligning the front and back sides of a semiconductor substrate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10226A (ja) * 1996-04-15 1998-01-06 Mitsugi Sugiyama Ｘ線により識別可能なプレス・スルー・パッケージ包装
JPH1074802A (ja) * 1996-08-30 1998-03-17 Shimu:Kk ボールグリッドアレイパッケージの接続構造及びその接続検査方法
JPH10199921A (ja) * 1997-01-09 1998-07-31 Hitachi Ltd 位置認識用マーク付半導体装置
JPH10284812A (ja) * 1997-04-08 1998-10-23 Mitsubishi Electric Corp 半導体デバイス
JPH11191575A (ja) * 1997-12-25 1999-07-13 Shinkawa Ltd フリップチップボンディング用部品、フリップチップボンディング確認用部品及びフリップチップボンディング方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014155455A1 (ja) * 2013-03-26 2014-10-02 日本特殊陶業株式会社 配線基板

Also Published As

Publication number Publication date
US20030082898A1 (en) 2003-05-01
WO2003038896A3 (en) 2003-07-31
IL156724A0 (en) 2004-01-04
HK1064509A1 (zh) 2005-01-28
EP1440471A2 (en) 2004-07-28
JP2010103543A (ja) 2010-05-06
WO2003038896A2 (en) 2003-05-08
CN100375281C (zh) 2008-03-12
US20040008812A1 (en) 2004-01-15
CN1515032A (zh) 2004-07-21
CA2433488A1 (en) 2003-05-08
BR0206243A (pt) 2004-12-28
US6777821B2 (en) 2004-08-17
US6563905B1 (en) 2003-05-13
IL156724A (en) 2007-07-04
AU2002342218A1 (en) 2003-05-12

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