JP2005514770A5 - - Google Patents

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Publication number
JP2005514770A5
JP2005514770A5 JP2003555588A JP2003555588A JP2005514770A5 JP 2005514770 A5 JP2005514770 A5 JP 2005514770A5 JP 2003555588 A JP2003555588 A JP 2003555588A JP 2003555588 A JP2003555588 A JP 2003555588A JP 2005514770 A5 JP2005514770 A5 JP 2005514770A5
Authority
JP
Japan
Prior art keywords
source
drain region
transistor
silicon
silicon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003555588A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005514770A (ja
Filing date
Publication date
Priority claimed from US10/023,350 external-priority patent/US6764917B1/en
Application filed filed Critical
Publication of JP2005514770A publication Critical patent/JP2005514770A/ja
Publication of JP2005514770A5 publication Critical patent/JP2005514770A5/ja
Pending legal-status Critical Current

Links

JP2003555588A 2001-12-20 2002-12-19 シリコンの厚みが異なるｓｏｉデバイス Pending JP2005514770A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/023,350 US6764917B1 (en) 2001-12-20 2001-12-20 SOI device with different silicon thicknesses
PCT/US2002/041102 WO2003054966A1 (en) 2001-12-20 2002-12-19 Soi device with different silicon thicknesses

Publications (2)

Publication Number Publication Date
JP2005514770A JP2005514770A (ja) 2005-05-19
JP2005514770A5 true JP2005514770A5 (enExample) 2006-02-16

Family

ID=21814574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003555588A Pending JP2005514770A (ja) 2001-12-20 2002-12-19 シリコンの厚みが異なるｓｏｉデバイス

Country Status (8)

Country Link
US (1) US6764917B1 (enExample)
JP (1) JP2005514770A (enExample)
KR (1) KR100948938B1 (enExample)
CN (1) CN1320657C (enExample)
AU (1) AU2002357367A1 (enExample)
DE (1) DE10297583B4 (enExample)
GB (1) GB2407703B (enExample)
WO (1) WO2003054966A1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003124345A (ja) * 2001-10-11 2003-04-25 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
US6764917B1 (en) 2001-12-20 2004-07-20 Advanced Micro Devices, Inc. SOI device with different silicon thicknesses
US6835983B2 (en) * 2002-10-25 2004-12-28 International Business Machines Corporation Silicon-on-insulator (SOI) integrated circuit (IC) chip with the silicon layers consisting of regions of different thickness
KR100489802B1 (ko) * 2002-12-18 2005-05-16 한국전자통신연구원 고전압 및 저전압 소자의 구조와 그 제조 방법
US6861716B1 (en) * 2003-10-31 2005-03-01 International Business Machines Corporation Ladder-type gate structure for four-terminal SOI semiconductor device
WO2006038164A1 (en) * 2004-10-08 2006-04-13 Koninklijke Philips Electronics N.V. Semiconductor device having substrate comprising layer with different thicknesses and method of manufacturing the same
US7666735B1 (en) * 2005-02-10 2010-02-23 Advanced Micro Devices, Inc. Method for forming semiconductor devices with active silicon height variation
JP5003857B2 (ja) * 2005-11-02 2012-08-15 セイコーエプソン株式会社 半導体装置の製造方法
US7986029B2 (en) * 2005-11-08 2011-07-26 Taiwan Semiconductor Manufacturing Company, Ltd. Dual SOI structure
US7402477B2 (en) * 2006-03-30 2008-07-22 Freescale Semiconductor, Inc. Method of making a multiple crystal orientation semiconductor device
JP5548356B2 (ja) * 2007-11-05 2014-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7939389B2 (en) * 2008-04-18 2011-05-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US20160071947A1 (en) * 2014-09-10 2016-03-10 Globalfoundries Inc. Method including a replacement of a dummy gate structure with a gate structure including a ferroelectric material
FR3051973B1 (fr) * 2016-05-24 2018-10-19 X-Fab France Procede de formation de transistors pdsoi et fdsoi sur un meme substrat
US10141229B2 (en) * 2016-09-29 2018-11-27 Globalfoundries Inc. Process for forming semiconductor layers of different thickness in FDSOI technologies
JP2018148123A (ja) * 2017-03-08 2018-09-20 ソニーセミコンダクタソリューションズ株式会社 半導体装置及び半導体装置の製造方法
FR3080486B1 (fr) * 2018-04-24 2020-03-27 X-Fab France Procede de formation d'un dispositif microelectronique
US11004867B2 (en) * 2018-06-28 2021-05-11 Taiwan Semiconductor Manufacturing Co., Ltd. Embedded ferroelectric memory in high-k first technology
US10748934B2 (en) 2018-08-28 2020-08-18 Qualcomm Incorporated Silicon on insulator with multiple semiconductor thicknesses using layer transfer
US11348944B2 (en) 2020-04-17 2022-05-31 Taiwan Semiconductor Manufacturing Company Limited Semiconductor wafer with devices having different top layer thicknesses

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0173953B1 (en) * 1984-08-28 1991-07-17 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device having a gate electrode
US5306942A (en) * 1989-10-11 1994-04-26 Nippondenso Co., Ltd. Semiconductor device having a shield which is maintained at a reference potential
US5463238A (en) 1992-02-25 1995-10-31 Seiko Instruments Inc. CMOS structure with parasitic channel prevention
TW214603B (en) * 1992-05-13 1993-10-11 Seiko Electron Co Ltd Semiconductor device
JPH07106579A (ja) * 1993-10-08 1995-04-21 Hitachi Ltd 半導体装置とその製造方法
US6060748A (en) * 1996-12-26 2000-05-09 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device using a silicon-on-insulator substrate
JP3114654B2 (ja) * 1997-06-05 2000-12-04 日本電気株式会社 半導体装置の製造方法
US5940691A (en) 1997-08-20 1999-08-17 Micron Technology, Inc. Methods of forming SOI insulator layers and methods of forming transistor devices
US5909400A (en) * 1997-08-22 1999-06-01 International Business Machines Corporation Three device BICMOS gain cell
JPH11176925A (ja) 1997-12-05 1999-07-02 Asahi Kasei Micro Syst Co Ltd 半導体装置の製造方法
JP2000049237A (ja) * 1998-07-28 2000-02-18 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP4493153B2 (ja) * 2000-04-19 2010-06-30 シャープ株式会社 窒化物系半導体発光素子
US6537891B1 (en) * 2000-08-29 2003-03-25 Micron Technology, Inc. Silicon on insulator DRAM process utilizing both fully and partially depleted devices
US6764917B1 (en) 2001-12-20 2004-07-20 Advanced Micro Devices, Inc. SOI device with different silicon thicknesses
US20060110765A1 (en) * 2004-11-23 2006-05-25 Wang Xiao B Detection of nucleic acid variation by cleavage-amplification (CleavAmp) method

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