JP2005510872A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2005510872A5 JP2005510872A5 JP2003548295A JP2003548295A JP2005510872A5 JP 2005510872 A5 JP2005510872 A5 JP 2005510872A5 JP 2003548295 A JP2003548295 A JP 2003548295A JP 2003548295 A JP2003548295 A JP 2003548295A JP 2005510872 A5 JP2005510872 A5 JP 2005510872A5
- Authority
- JP
- Japan
- Prior art keywords
- containing material
- silicon
- gate electrode
- metal gate
- amount
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000463 material Substances 0.000 claims 40
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 37
- 229910052710 silicon Inorganic materials 0.000 claims 37
- 239000010703 silicon Substances 0.000 claims 37
- 239000002184 metal Substances 0.000 claims 27
- 229910052751 metal Inorganic materials 0.000 claims 27
- 238000000034 method Methods 0.000 claims 23
- 239000004065 semiconductor Substances 0.000 claims 16
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims 15
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 12
- 239000001301 oxygen Substances 0.000 claims 12
- 229910052760 oxygen Inorganic materials 0.000 claims 12
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims 11
- 229910021332 silicide Inorganic materials 0.000 claims 8
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 8
- 125000006850 spacer group Chemical group 0.000 claims 8
- 239000000758 substrate Substances 0.000 claims 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 6
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 claims 4
- 238000000151 deposition Methods 0.000 claims 3
- 230000008021 deposition Effects 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 claims 3
- 229910052757 nitrogen Inorganic materials 0.000 claims 3
- 229910004200 TaSiN Inorganic materials 0.000 claims 2
- 229910008807 WSiN Inorganic materials 0.000 claims 2
- 229910045601 alloy Inorganic materials 0.000 claims 2
- 239000000956 alloy Substances 0.000 claims 2
- 229910052782 aluminium Inorganic materials 0.000 claims 2
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 229910052802 copper Inorganic materials 0.000 claims 2
- 239000000203 mixture Substances 0.000 claims 2
- 229910052750 molybdenum Inorganic materials 0.000 claims 2
- 229910052759 nickel Inorganic materials 0.000 claims 2
- 150000004767 nitrides Chemical class 0.000 claims 2
- 229910052702 rhenium Inorganic materials 0.000 claims 2
- 229910052715 tantalum Inorganic materials 0.000 claims 2
- 229910052719 titanium Inorganic materials 0.000 claims 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims 1
- 230000007812 deficiency Effects 0.000 claims 1
- 230000002950 deficient Effects 0.000 claims 1
- 239000001257 hydrogen Substances 0.000 claims 1
- 229910052739 hydrogen Inorganic materials 0.000 claims 1
- 239000012212 insulator Substances 0.000 claims 1
- 239000000376 reactant Substances 0.000 claims 1
- 229910000077 silane Inorganic materials 0.000 claims 1
- 239000000126 substance Substances 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/994,128 US6509282B1 (en) | 2001-11-26 | 2001-11-26 | Silicon-starved PECVD method for metal gate electrode dielectric spacer |
| PCT/US2002/032582 WO2003046971A1 (en) | 2001-11-26 | 2002-10-11 | Method for forming an oxynitride spacer for a metal gate electrode using a pecvd process with a silicon-starving atmosphere |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005510872A JP2005510872A (ja) | 2005-04-21 |
| JP2005510872A5 true JP2005510872A5 (enExample) | 2006-08-03 |
Family
ID=25540311
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003548295A Pending JP2005510872A (ja) | 2001-11-26 | 2002-10-11 | シリコン欠乏雰囲気中のｐｅｃｖｄプロセスを用いた、金属ゲート電極のための酸窒化物スペーサの形成方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US6509282B1 (enExample) |
| EP (1) | EP1449243A1 (enExample) |
| JP (1) | JP2005510872A (enExample) |
| KR (1) | KR100891367B1 (enExample) |
| CN (1) | CN100355043C (enExample) |
| AU (1) | AU2002347877A1 (enExample) |
| WO (1) | WO2003046971A1 (enExample) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4659329B2 (ja) * | 2000-06-26 | 2011-03-30 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| US20040212025A1 (en) * | 2003-04-28 | 2004-10-28 | Wilman Tsai | High k oxide |
| JP4511307B2 (ja) * | 2004-02-10 | 2010-07-28 | セイコーエプソン株式会社 | ゲート絶縁膜、半導体素子、電子デバイスおよび電子機器 |
| US7102191B2 (en) * | 2004-03-24 | 2006-09-05 | Micron Technologies, Inc. | Memory device with high dielectric constant gate dielectrics and metal floating gates |
| JP4876375B2 (ja) * | 2004-07-06 | 2012-02-15 | ソニー株式会社 | 半導体装置およびその製造方法 |
| US7332439B2 (en) * | 2004-09-29 | 2008-02-19 | Intel Corporation | Metal gate transistors with epitaxial source and drain regions |
| KR100688575B1 (ko) * | 2004-10-08 | 2007-03-02 | 삼성전자주식회사 | 비휘발성 반도체 메모리 소자 |
| US20060094194A1 (en) * | 2004-11-04 | 2006-05-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Advanced disposable spacer process by low-temperature high-stress nitride film for sub-90NM CMOS technology |
| US7732923B2 (en) * | 2004-12-30 | 2010-06-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Impurity doped UV protection layer |
| KR100771808B1 (ko) * | 2006-07-05 | 2007-10-30 | 주식회사 하이닉스반도체 | Ｓｏｎｏｓ 구조를 갖는 플래시 메모리 소자 및 그것의제조 방법 |
| KR100819706B1 (ko) * | 2006-12-27 | 2008-04-04 | 동부일렉트로닉스 주식회사 | 씨모스 이미지센서 및 그 제조방법 |
| DE202007001431U1 (de) * | 2007-01-31 | 2007-05-16 | Infineon Technologies Austria Ag | Halbleiteranordnung und Leistungshalbleiterbauelement |
| JP5358893B2 (ja) * | 2007-04-03 | 2013-12-04 | 三菱電機株式会社 | トランジスタ |
| US20080246099A1 (en) * | 2007-04-09 | 2008-10-09 | Ajith Varghese | Low temperature poly oxide processes for high-k/metal gate flow |
| CN102157360B (zh) * | 2010-02-11 | 2012-12-12 | 中芯国际集成电路制造(上海)有限公司 | 一种栅极制造方法 |
| US8936965B2 (en) * | 2010-11-26 | 2015-01-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US8822283B2 (en) | 2011-09-02 | 2014-09-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Self-aligned insulated film for high-k metal gate device |
| KR102309244B1 (ko) | 2013-02-20 | 2021-10-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| TWI695525B (zh) | 2014-07-25 | 2020-06-01 | 日商半導體能源研究所股份有限公司 | 剝離方法、發光裝置、模組以及電子裝置 |
| US11223289B2 (en) | 2020-01-17 | 2022-01-11 | Astec International Limited | Regulated switched mode power supplies having adjustable output voltages |
| CN111540673B (zh) * | 2020-07-07 | 2020-10-16 | 中芯集成电路制造(绍兴)有限公司 | 半导体器件的形成方法 |
| KR102608390B1 (ko) | 2021-07-06 | 2023-12-01 | 한국과학기술연구원 | 내구성이 우수한 컬러링 금속 부재 및 이의 제조방법 |
Family Cites Families (41)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US444124A (en) * | 1891-01-06 | Matrix making machine | ||
| US4441247A (en) | 1981-06-29 | 1984-04-10 | Intel Corporation | Method of making MOS device by forming self-aligned polysilicon and tungsten composite gate |
| US4648175A (en) | 1985-06-12 | 1987-03-10 | Ncr Corporation | Use of selectively deposited tungsten for contact formation and shunting metallization |
| JPS63184340A (ja) * | 1986-09-08 | 1988-07-29 | Nec Corp | 半導体装置 |
| JPS63316476A (ja) | 1987-06-18 | 1988-12-23 | Seiko Instr & Electronics Ltd | 半導体装置およびその製造方法 |
| US4854263B1 (en) | 1987-08-14 | 1997-06-17 | Applied Materials Inc | Inlet manifold and methods for increasing gas dissociation and for PECVD of dielectric films |
| JPH01173635A (ja) * | 1987-12-28 | 1989-07-10 | Nissan Motor Co Ltd | 半導体装置の製造方法 |
| GB2244860A (en) | 1990-06-04 | 1991-12-11 | Philips Electronic Associated | Fabricating mim type device array and display devices incorporating such arrays |
| JPH04209543A (ja) * | 1990-12-06 | 1992-07-30 | Seiko Instr Inc | 半導体装置の製造方法 |
| FR2670605B1 (fr) | 1990-12-13 | 1993-04-09 | France Etat | Procede de realisation d'une barriere de diffusion electriquement conductrice a l'interface metal/silicium d'un transistor mos et transistor correspondant. |
| JP2506539B2 (ja) * | 1992-02-27 | 1996-06-12 | 株式会社ジーティシー | 絶縁膜の形成方法 |
| GB9206086D0 (en) | 1992-03-20 | 1992-05-06 | Philips Electronics Uk Ltd | Manufacturing electronic devices comprising,e.g.tfts and mims |
| JP2722989B2 (ja) * | 1993-04-27 | 1998-03-09 | 日本電気株式会社 | 配線の埋め込み方法 |
| DE69433836D1 (de) * | 1993-12-28 | 2004-07-15 | Applied Materials Inc | Verfahren zur plasma-unterstützten chemischen Dampfabscheidung von Silizium-Oxynitridschichten |
| US5482894A (en) * | 1994-08-23 | 1996-01-09 | Texas Instruments Incorporated | Method of fabricating a self-aligned contact using organic dielectric materials |
| NZ280375A (en) | 1996-05-01 | 1998-09-24 | Ind Res Ltd | A silicon oxynitride ceramic material characterised by its x-ray powder diffraction trace |
| TW320752B (en) | 1996-11-18 | 1997-11-21 | United Microelectronics Corp | Metal gate electrode process |
| US5930627A (en) | 1997-05-05 | 1999-07-27 | Chartered Semiconductor Manufacturing Company, Ltd. | Process improvements in self-aligned polysilicon MOSFET technology using silicon oxynitride |
| US5989957A (en) | 1997-05-21 | 1999-11-23 | Advanced Micro Devices | Process for fabricating semiconductor memory device with high data retention including silicon oxynitride etch stop layer formed at high temperature with low hydrogen ion concentration |
| US6187656B1 (en) | 1997-10-07 | 2001-02-13 | Texas Instruments Incorporated | CVD-based process for manufacturing stable low-resistivity poly-metal gate electrodes |
| US6140190A (en) * | 1997-12-18 | 2000-10-31 | Advanced Micro Devices | Method and structure for elevated source/drain with polished gate electrode insulated gate field effect transistors |
| US6051487A (en) | 1997-12-18 | 2000-04-18 | Advanced Micro Devices, Inc. | Semiconductor device fabrication using a sacrificial plug for defining a region for a gate electrode |
| US6274421B1 (en) | 1998-01-09 | 2001-08-14 | Sharp Laboratories Of America, Inc. | Method of making metal gate sub-micron MOS transistor |
| US6225168B1 (en) | 1998-06-04 | 2001-05-01 | Advanced Micro Devices, Inc. | Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof |
| US6200734B1 (en) * | 1998-06-15 | 2001-03-13 | Lucent Technologies Inc. | Method for fabricating semiconductor devices |
| US6107171A (en) | 1998-07-09 | 2000-08-22 | Vanguard International Semiconductor Corporation | Method to manufacture metal gate of integrated circuits |
| US6110779A (en) | 1998-07-17 | 2000-08-29 | Advanced Micro Devices, Inc. | Method and structure of etching a memory cell polysilicon gate layer using resist mask and etched silicon oxynitride |
| US6100559A (en) * | 1998-08-14 | 2000-08-08 | Advanced Micro Devices, Inc. | Multipurpose graded silicon oxynitride cap layer |
| JP2000091337A (ja) * | 1998-09-09 | 2000-03-31 | Toshiba Microelectronics Corp | 半導体装置及びその製造方法 |
| US6066533A (en) | 1998-09-29 | 2000-05-23 | Advanced Micro Devices, Inc. | MOS transistor with dual metal gate structure |
| US6245605B1 (en) | 1998-09-29 | 2001-06-12 | Texas Instruments Incorporated | Method to protect metal from oxidation during poly-metal gate formation in semiconductor device manufacturing |
| US6162694A (en) | 1998-11-25 | 2000-12-19 | Advanced Micro Devices, Inc. | Method of forming a metal gate electrode using replaced polysilicon structure |
| US6221794B1 (en) * | 1998-12-08 | 2001-04-24 | Advanced Micro Devices, Inc. | Method of reducing incidence of stress-induced voiding in semiconductor interconnect lines |
| KR100300628B1 (ko) * | 1999-02-08 | 2001-09-26 | 윤종용 | 실리콘 옥시나이트라이드 보호층을 갖는 반도체 장치 및 그 제조 방법 |
| US6291282B1 (en) | 1999-02-26 | 2001-09-18 | Texas Instruments Incorporated | Method of forming dual metal gate structures or CMOS devices |
| US6096656A (en) | 1999-06-24 | 2000-08-01 | Sandia Corporation | Formation of microchannels from low-temperature plasma-deposited silicon oxynitride |
| US6046103A (en) * | 1999-08-02 | 2000-04-04 | Taiwan Semiconductor Manufacturing Company | Borderless contact process for a salicide devices |
| JP4243401B2 (ja) * | 1999-12-21 | 2009-03-25 | エルジー ディスプレイ カンパニー リミテッド | 銅配線基板およびその製造方法ならびに液晶表示装置 |
| US6372668B2 (en) * | 2000-01-18 | 2002-04-16 | Advanced Micro Devices, Inc. | Method of forming silicon oxynitride films |
| US6670695B1 (en) * | 2000-02-29 | 2003-12-30 | United Microelectronics Corp. | Method of manufacturing anti-reflection layer |
| JP2001308086A (ja) * | 2000-04-18 | 2001-11-02 | Nec Corp | 膜形成方法 |
-
2001
- 2001-11-26 US US09/994,128 patent/US6509282B1/en not_active Expired - Fee Related
-
2002
- 2002-09-18 US US10/246,267 patent/US6605848B2/en not_active Expired - Lifetime
- 2002-10-11 EP EP02784088A patent/EP1449243A1/en not_active Withdrawn
- 2002-10-11 CN CNB02823443XA patent/CN100355043C/zh not_active Expired - Fee Related
- 2002-10-11 WO PCT/US2002/032582 patent/WO2003046971A1/en not_active Ceased
- 2002-10-11 KR KR1020047007987A patent/KR100891367B1/ko not_active Expired - Fee Related
- 2002-10-11 JP JP2003548295A patent/JP2005510872A/ja active Pending
- 2002-10-11 AU AU2002347877A patent/AU2002347877A1/en not_active Abandoned
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2005510872A5 (enExample) | ||
| JP4896016B2 (ja) | 先端トランジスタ製造のための低熱量窒化シリコンの形成 | |
| TW540119B (en) | Enhanced deposition control in fabricating devices in a semiconductor wafer | |
| TWI378505B (en) | A new material for contact etch layer to enhance device performance | |
| US7488690B2 (en) | Silicon nitride film with stress control | |
| TWI352393B (en) | Method for fabricating silicon nitride spacer stru | |
| TWI251298B (en) | Method for fabricating copper interconnects | |
| TWI524392B (zh) | 穩定矽化金屬膜及其製造方法 | |
| US6605848B2 (en) | Semiconductor device with metal gate electrode and silicon oxynitride spacer | |
| TW200834675A (en) | Formation of epitaxial layers containing silicon and carbon | |
| US6797558B2 (en) | Methods of forming a capacitor with substantially selective deposite of polysilicon on a substantially crystalline capacitor dielectric layer | |
| CN1331200C (zh) | 半导体器件及传导结构形成工艺 | |
| TW202107567A (zh) | 積體電路結構及其製造方法 | |
| US20060024959A1 (en) | Thin tungsten silicide layer deposition and gate metal integration | |
| US20050045092A1 (en) | Method of multi-element compound deposition by atomic layer deposition for IC barrier layer applications | |
| JP2002025944A (ja) | 半導体素子の製造方法 | |
| US6514841B2 (en) | Method for manufacturing gate structure for use in semiconductor device | |
| TW200409341A (en) | Semiconductor device and its manufacturing method | |
| JP4563016B2 (ja) | シリコン基板の複合面に酸化膜を形成する方法 | |
| CN117012710A (zh) | 金属膜的高压氧化 | |
| KR100631937B1 (ko) | 텅스텐 게이트 형성방법 | |
| JP2006016641A (ja) | 金属シリコンオキサイドの製造方法、金属シリコンオキシナイトライドの製造方法、およびシリコンドープされた金属ナイトライドの製造方法 | |
| TWI343606B (en) | A metal oxide semiconductor device and a method of forming a gate stack containing a gate dielectric layer having reduced metal content | |
| US12501686B2 (en) | Semiconductor device with capping layer | |
| JPS63272049A (ja) | 半導体装置の製造方法 |