JP2005510872A - シリコン欠乏雰囲気中のｐｅｃｖｄプロセスを用いた、金属ゲート電極のための酸窒化物スペーサの形成方法 - Google Patents

シリコン欠乏雰囲気中のｐｅｃｖｄプロセスを用いた、金属ゲート電極のための酸窒化物スペーサの形成方法 Download PDF

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JP2005510872A
JP2005510872A JP2003548295A JP2003548295A JP2005510872A JP 2005510872 A JP2005510872 A JP 2005510872A JP 2003548295 A JP2003548295 A JP 2003548295A JP 2003548295 A JP2003548295 A JP 2003548295A JP 2005510872 A JP2005510872 A JP 2005510872A
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silicon
gate electrode
metal gate
silicon oxynitride
metal
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Japanese (ja)
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JP2005510872A5 (enExample
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バン エヌジーオー ミン
ハリヤル アービンド
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/308—Oxynitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Composite Materials (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Thin Film Transistor (AREA)
JP2003548295A 2001-11-26 2002-10-11 シリコン欠乏雰囲気中のｐｅｃｖｄプロセスを用いた、金属ゲート電極のための酸窒化物スペーサの形成方法 Pending JP2005510872A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/994,128 US6509282B1 (en) 2001-11-26 2001-11-26 Silicon-starved PECVD method for metal gate electrode dielectric spacer
PCT/US2002/032582 WO2003046971A1 (en) 2001-11-26 2002-10-11 Method for forming an oxynitride spacer for a metal gate electrode using a pecvd process with a silicon-starving atmosphere

Publications (2)

Publication Number Publication Date
JP2005510872A true JP2005510872A (ja) 2005-04-21
JP2005510872A5 JP2005510872A5 (enExample) 2006-08-03

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JP2003548295A Pending JP2005510872A (ja) 2001-11-26 2002-10-11 シリコン欠乏雰囲気中のｐｅｃｖｄプロセスを用いた、金属ゲート電極のための酸窒化物スペーサの形成方法

Country Status (7)

Country Link
US (2) US6509282B1 (enExample)
EP (1) EP1449243A1 (enExample)
JP (1) JP2005510872A (enExample)
KR (1) KR100891367B1 (enExample)
CN (1) CN100355043C (enExample)
AU (1) AU2002347877A1 (enExample)
WO (1) WO2003046971A1 (enExample)

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JP2006024609A (ja) * 2004-07-06 2006-01-26 Sony Corp 半導体装置およびその製造方法

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JP4511307B2 (ja) * 2004-02-10 2010-07-28 セイコーエプソン株式会社 ゲート絶縁膜、半導体素子、電子デバイスおよび電子機器
US7102191B2 (en) * 2004-03-24 2006-09-05 Micron Technologies, Inc. Memory device with high dielectric constant gate dielectrics and metal floating gates
US7332439B2 (en) * 2004-09-29 2008-02-19 Intel Corporation Metal gate transistors with epitaxial source and drain regions
KR100688575B1 (ko) * 2004-10-08 2007-03-02 삼성전자주식회사 비휘발성 반도체 메모리 소자
US20060094194A1 (en) * 2004-11-04 2006-05-04 Taiwan Semiconductor Manufacturing Company, Ltd. Advanced disposable spacer process by low-temperature high-stress nitride film for sub-90NM CMOS technology
US7732923B2 (en) * 2004-12-30 2010-06-08 Taiwan Semiconductor Manufacturing Company, Ltd. Impurity doped UV protection layer
KR100771808B1 (ko) * 2006-07-05 2007-10-30 주식회사 하이닉스반도체 Ｓｏｎｏｓ 구조를 갖는 플래시 메모리 소자 및 그것의제조 방법
KR100819706B1 (ko) * 2006-12-27 2008-04-04 동부일렉트로닉스 주식회사 씨모스 이미지센서 및 그 제조방법
DE202007001431U1 (de) * 2007-01-31 2007-05-16 Infineon Technologies Austria Ag Halbleiteranordnung und Leistungshalbleiterbauelement
JP5358893B2 (ja) * 2007-04-03 2013-12-04 三菱電機株式会社 トランジスタ
US20080246099A1 (en) * 2007-04-09 2008-10-09 Ajith Varghese Low temperature poly oxide processes for high-k/metal gate flow
CN102157360B (zh) * 2010-02-11 2012-12-12 中芯国际集成电路制造(上海)有限公司 一种栅极制造方法
US8936965B2 (en) * 2010-11-26 2015-01-20 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8822283B2 (en) 2011-09-02 2014-09-02 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned insulated film for high-k metal gate device
KR102309244B1 (ko) 2013-02-20 2021-10-05 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
TWI695525B (zh) 2014-07-25 2020-06-01 日商半導體能源研究所股份有限公司 剝離方法、發光裝置、模組以及電子裝置
US11223289B2 (en) 2020-01-17 2022-01-11 Astec International Limited Regulated switched mode power supplies having adjustable output voltages
CN111540673B (zh) * 2020-07-07 2020-10-16 中芯集成电路制造(绍兴)有限公司 半导体器件的形成方法
KR102608390B1 (ko) 2021-07-06 2023-12-01 한국과학기술연구원 내구성이 우수한 컬러링 금속 부재 및 이의 제조방법

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JPS63184340A (ja) * 1986-09-08 1988-07-29 Nec Corp 半導体装置
JPH01173635A (ja) * 1987-12-28 1989-07-10 Nissan Motor Co Ltd 半導体装置の製造方法
JPH04209543A (ja) * 1990-12-06 1992-07-30 Seiko Instr Inc 半導体装置の製造方法
JPH0684888A (ja) * 1992-02-27 1994-03-25 G T C:Kk 絶縁膜の形成方法
JPH06310504A (ja) * 1993-04-27 1994-11-04 Nec Corp 絶縁膜の構造とその製造方法
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006024609A (ja) * 2004-07-06 2006-01-26 Sony Corp 半導体装置およびその製造方法

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US6605848B2 (en) 2003-08-12
CN100355043C (zh) 2007-12-12
US20030098487A1 (en) 2003-05-29
AU2002347877A1 (en) 2003-06-10
US6509282B1 (en) 2003-01-21
EP1449243A1 (en) 2004-08-25
KR20040060991A (ko) 2004-07-06
WO2003046971A1 (en) 2003-06-05
KR100891367B1 (ko) 2009-04-02
CN1592959A (zh) 2005-03-09

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