JP2003347936A5 - - Google Patents

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Publication number
JP2003347936A5
JP2003347936A5 JP2002279287A JP2002279287A JP2003347936A5 JP 2003347936 A5 JP2003347936 A5 JP 2003347936A5 JP 2002279287 A JP2002279287 A JP 2002279287A JP 2002279287 A JP2002279287 A JP 2002279287A JP 2003347936 A5 JP2003347936 A5 JP 2003347936A5
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JP
Japan
Prior art keywords
clock
circuit
signal
phase
comparison
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002279287A
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English (en)
Japanese (ja)
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JP2003347936A (ja
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Publication date
Application filed filed Critical
Priority to JP2002279287A priority Critical patent/JP2003347936A/ja
Priority claimed from JP2002279287A external-priority patent/JP2003347936A/ja
Priority to US10/286,418 priority patent/US6703877B2/en
Publication of JP2003347936A publication Critical patent/JP2003347936A/ja
Publication of JP2003347936A5 publication Critical patent/JP2003347936A5/ja
Pending legal-status Critical Current

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JP2002279287A 2001-11-02 2002-09-25 クロック整形回路および電子機器 Pending JP2003347936A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002279287A JP2003347936A (ja) 2001-11-02 2002-09-25 クロック整形回路および電子機器
US10/286,418 US6703877B2 (en) 2001-11-02 2002-11-01 Clock shaping circuit and electronic equipment

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2001-338046 2001-11-02
JP2001338046 2001-11-02
JP2002079761 2002-03-20
JP2002-79761 2002-03-20
JP2002279287A JP2003347936A (ja) 2001-11-02 2002-09-25 クロック整形回路および電子機器

Publications (2)

Publication Number Publication Date
JP2003347936A JP2003347936A (ja) 2003-12-05
JP2003347936A5 true JP2003347936A5 (enExample) 2005-08-11

Family

ID=27347780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002279287A Pending JP2003347936A (ja) 2001-11-02 2002-09-25 クロック整形回路および電子機器

Country Status (2)

Country Link
US (1) US6703877B2 (enExample)
JP (1) JP2003347936A (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3980943B2 (ja) * 2002-06-06 2007-09-26 日本電波工業株式会社 Pll制御発振器
JP4138424B2 (ja) * 2002-09-25 2008-08-27 セイコーエプソン株式会社 クロック変換器およびそのクロック変換器を備えた電子機器
JP4306458B2 (ja) * 2003-03-20 2009-08-05 セイコーエプソン株式会社 電圧制御型発振器、クロック変換器及び電子機器
US20040227578A1 (en) * 2003-05-14 2004-11-18 Miikka Hamalainen Acoustic resonance-based frequency synthesizer using at least one bulk acoustic wave (BAW) or thin film bulk acoustic wave (FBAR) device
JP2004356800A (ja) * 2003-05-28 2004-12-16 Rohm Co Ltd 発振回路
EP1517434A1 (de) * 2003-09-19 2005-03-23 Siemens Aktiengesellschaft Frequenzstabilisierter Oszillator
US7155176B2 (en) * 2004-04-08 2006-12-26 Skyworks Solutions, Inc. System for synchronizing a portable transceiver to a network
US7778173B2 (en) * 2005-01-04 2010-08-17 Cisco Technology, Inc. Clock recovery algorithm for remultiplexing MPEG-2 SPTSs and/or MPTSs in the presence of network jitter
JP2006252681A (ja) * 2005-03-11 2006-09-21 Hitachi Ltd 光ディスク装置及びpll回路
JP2006303554A (ja) * 2005-04-15 2006-11-02 Renesas Technology Corp 論理レベル変換回路及びそれを用いた位相同期回路
US7288975B2 (en) * 2005-10-27 2007-10-30 International Business Machines Corporation Method and apparatus for fail-safe and restartable system clock generation
DE102006024469B3 (de) * 2006-05-24 2007-07-12 Xignal Technologies Ag Phasenregelkreis zur Erzeugung mehrerer Ausgangssignale
DE102006024471A1 (de) * 2006-05-24 2007-12-06 Xignal Technologies Ag Umschaltbarer Phasenregelkreis sowie Verfahren zum Betrieb eines umschaltbaren Phasenregelkreises
DE102006024470B4 (de) * 2006-05-24 2015-07-09 Xignal Technologies Ag Umschaltbarer Phasenregelkreis sowie Verfahren zum Betrieb eines umschaltbaren Phasenregelkreises
US7816921B2 (en) * 2006-09-20 2010-10-19 Baker Hughes Incorporated Resistivity tools with load-bearing azimuthally sensitive antennas and methods of using same
DE102006048379B4 (de) * 2006-10-12 2008-11-06 Infineon Technologies Ag Verfahren zur Durchsatzsteuerung einer elektronischen Schaltung sowie entsprechende Durchsatzsteuerung und zugehörige Halbleiterschaltung
TWI470934B (zh) * 2009-10-06 2015-01-21 晨星半導體股份有限公司 可攜式控制裝置及其方法
WO2012031241A2 (en) 2010-09-03 2012-03-08 Skyworks Solutions, Inc. High-voltage tolerant voltage regulator
US8854095B2 (en) * 2012-11-12 2014-10-07 Stmicroelectronics International N.V. Fast lock acquisition and detection circuit for phase-locked loops
US9960776B2 (en) * 2013-03-14 2018-05-01 Applied Materials, Inc. Method and apparatus for generating a variable clock used to control a component of a substrate processing system
CN109100928B (zh) * 2018-09-05 2020-07-14 山东交通学院 一种高精度脉冲时间间隔测量方法及电路
CN114966345B (zh) * 2022-05-31 2023-07-21 北京泰岳天成科技有限公司 一种高频电流局放信号采样装置及方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2664249B2 (ja) * 1989-03-13 1997-10-15 株式会社日立製作所 タイミング抽出回路,それを利用した通信システム及びタイミング抽出方法並びに通信装置
JPH1168557A (ja) * 1997-08-18 1999-03-09 Advantest Corp 基準周波数発生装置
KR200314154Y1 (ko) * 1997-12-29 2003-08-14 엘지정보통신주식회사 디피피엘엘에서 주파수와 위상 동시 보상 장치
US6081163A (en) * 1999-01-22 2000-06-27 Advantest Corp. Standard frequency and timing generator and generation method thereof
US6313708B1 (en) * 2000-07-26 2001-11-06 Marconi Communications, Inc. Analog phase locked loop holdover

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