JP2002521779A - 強誘電性記憶装置 - Google Patents
強誘電性記憶装置Info
- Publication number
- JP2002521779A JP2002521779A JP2000561619A JP2000561619A JP2002521779A JP 2002521779 A JP2002521779 A JP 2002521779A JP 2000561619 A JP2000561619 A JP 2000561619A JP 2000561619 A JP2000561619 A JP 2000561619A JP 2002521779 A JP2002521779 A JP 2002521779A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- memory
- short
- capacitor
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 44
- 230000005669 field effect Effects 0.000 claims description 19
- 210000004027 cell Anatomy 0.000 description 73
- 238000010586 diagram Methods 0.000 description 10
- 230000010287 polarization Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- VNSWULZVUKFJHK-UHFFFAOYSA-N [Sr].[Bi] Chemical compound [Sr].[Bi] VNSWULZVUKFJHK-UHFFFAOYSA-N 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008033 biological extinction Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000006735 deficit Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19832994.6 | 1998-07-22 | ||
| DE19832994A DE19832994C2 (de) | 1998-07-22 | 1998-07-22 | Ferroelektrische Speicheranordnung |
| PCT/DE1999/002071 WO2000005720A1 (de) | 1998-07-22 | 1999-07-05 | Ferroelektrische speicheranordnung |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002521779A true JP2002521779A (ja) | 2002-07-16 |
| JP2002521779A5 JP2002521779A5 (https=) | 2008-03-06 |
Family
ID=7874932
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000561619A Ceased JP2002521779A (ja) | 1998-07-22 | 1999-07-05 | 強誘電性記憶装置 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6424558B2 (https=) |
| EP (1) | EP1103051B1 (https=) |
| JP (1) | JP2002521779A (https=) |
| KR (1) | KR100554211B1 (https=) |
| CN (1) | CN1143316C (https=) |
| DE (2) | DE19832994C2 (https=) |
| TW (1) | TW548652B (https=) |
| WO (1) | WO2000005720A1 (https=) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19929308C1 (de) | 1999-06-25 | 2000-11-09 | Siemens Ag | Verfahren zur Herstellung einer ferroelektrischen Speicheranordnung |
| DE10005619A1 (de) * | 2000-02-09 | 2001-08-30 | Infineon Technologies Ag | Integrierter Halbleiterspeicher mit Speicherzellen mit ferroelektrischem Speichereffekt |
| DE10016726A1 (de) | 2000-04-04 | 2001-10-18 | Infineon Technologies Ag | Verfahren zum Betrieb einer ferroelektrischen Speicheranordnung |
| DE10017368B4 (de) * | 2000-04-07 | 2005-12-15 | Infineon Technologies Ag | Verfahren zum Betrieb eines integrierten Speichers |
| US6411555B1 (en) * | 2001-03-19 | 2002-06-25 | Micron Technology, Inc. | Reference charge generator, a method for providing a reference charge from a reference charge generator, a method of operating a reference charge generator and a dram memory circuit formed using memory cells having an area of 6f2 |
| US20040119105A1 (en) * | 2002-12-18 | 2004-06-24 | Wilson Dennis Robert | Ferroelectric memory |
| CN100508061C (zh) * | 2003-01-17 | 2009-07-01 | 华邦电子股份有限公司 | 消除动态随机处理内存的短路漏泄电流的电路 |
| US7196924B2 (en) * | 2004-04-06 | 2007-03-27 | Macronix International Co., Ltd. | Method of multi-level cell FeRAM |
| JP4088975B2 (ja) * | 2004-07-14 | 2008-05-21 | セイコーエプソン株式会社 | 強誘電体メモリ装置及び電子機器 |
| JP4061597B2 (ja) * | 2004-07-14 | 2008-03-19 | セイコーエプソン株式会社 | 強誘電体メモリ装置及び電子機器 |
| DE102004042171A1 (de) * | 2004-08-31 | 2006-04-20 | Infineon Technologies Ag | Schutzschaltung für nichtflüchtige, elektrostatisch sensitive Speicher |
| CN100390901C (zh) * | 2006-04-21 | 2008-05-28 | 北京大学深圳研究生院 | 铁电动态随机存储器单管单元阵列的编程方法 |
| FR2904029B1 (fr) | 2006-07-21 | 2008-08-29 | Simu Sas | Dispositif de commande d'un organe de debrayage d'un actionneur electrique |
| CN101252018B (zh) * | 2007-09-03 | 2010-06-02 | 清华大学 | 采用新型时序操作的铁电编程信息存储单元的时序操作方法 |
| CN101271728B (zh) * | 2008-04-22 | 2011-05-11 | 清华大学 | 一种抑制小信号干扰的铁电存储器存储阵列结构 |
| US7848131B2 (en) * | 2008-10-19 | 2010-12-07 | Juhan Kim | High speed ferroelectric random access memory |
| US9412705B2 (en) * | 2011-06-27 | 2016-08-09 | Thin Film Electronics Asa | Short circuit reduction in a ferroelectric memory cell comprising a stack of layers arranged on a flexible substrate |
| US9552864B1 (en) * | 2016-03-11 | 2017-01-24 | Micron Technology, Inc. | Offset compensation for ferroelectric memory cell sensing |
| US10580510B2 (en) * | 2017-12-22 | 2020-03-03 | Nanya Technology Corporation | Test system and method of operating the same |
| US11088170B2 (en) | 2019-11-25 | 2021-08-10 | Sandisk Technologies Llc | Three-dimensional ferroelectric memory array including integrated gate selectors and methods of forming the same |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0197016A (ja) | 1987-10-09 | 1989-04-14 | Fujitsu Ltd | 半導体集積回路装置 |
| US4999519A (en) | 1987-12-04 | 1991-03-12 | Hitachi Vlsi Engineering Corporation | Semiconductor circuit with low power consumption having emitter-coupled logic or differential amplifier |
| US5121353A (en) * | 1989-07-06 | 1992-06-09 | Kabushiki Kaisha Toshiba | Ferroelectric capacitor memory circuit MOS setting and transmission transistor |
| US5224069A (en) * | 1989-07-06 | 1993-06-29 | Kabushiki Kaisha Toshiba | Ferroelectric capacitor memory circuit MOS setting and transmission transistors |
| US5151622A (en) | 1990-11-06 | 1992-09-29 | Vitelic Corporation | CMOS logic circuit with output coupled to multiple feedback paths and associated method |
| JP3278981B2 (ja) * | 1993-06-23 | 2002-04-30 | 株式会社日立製作所 | 半導体メモリ |
| US5424975A (en) * | 1993-12-30 | 1995-06-13 | Micron Technology, Inc. | Reference circuit for a non-volatile ferroelectric memory |
| JP3183076B2 (ja) * | 1994-12-27 | 2001-07-03 | 日本電気株式会社 | 強誘電体メモリ装置 |
| US5959878A (en) * | 1997-09-15 | 1999-09-28 | Celis Semiconductor Corporation | Ferroelectric memory cell with shunted ferroelectric capacitor and method of making same |
| US6256220B1 (en) * | 1997-09-15 | 2001-07-03 | Celis Semiconductor Corporation | Ferroelectric memory with shunted isolated nodes |
| US6147895A (en) * | 1999-06-04 | 2000-11-14 | Celis Semiconductor Corporation | Ferroelectric memory with two ferroelectric capacitors in memory cell and method of operating same |
-
1998
- 1998-07-22 DE DE19832994A patent/DE19832994C2/de not_active Expired - Fee Related
-
1999
- 1999-07-05 KR KR1020017000864A patent/KR100554211B1/ko not_active Expired - Fee Related
- 1999-07-05 DE DE59905214T patent/DE59905214D1/de not_active Expired - Fee Related
- 1999-07-05 WO PCT/DE1999/002071 patent/WO2000005720A1/de not_active Ceased
- 1999-07-05 EP EP99945910A patent/EP1103051B1/de not_active Expired - Lifetime
- 1999-07-05 JP JP2000561619A patent/JP2002521779A/ja not_active Ceased
- 1999-07-05 CN CNB998089885A patent/CN1143316C/zh not_active Expired - Fee Related
- 1999-07-20 TW TW088112280A patent/TW548652B/zh not_active IP Right Cessation
-
2001
- 2001-01-22 US US09/767,804 patent/US6424558B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR100554211B1 (ko) | 2006-02-22 |
| DE59905214D1 (de) | 2003-05-28 |
| US6424558B2 (en) | 2002-07-23 |
| EP1103051B1 (de) | 2003-04-23 |
| EP1103051A1 (de) | 2001-05-30 |
| KR20010053585A (ko) | 2001-06-25 |
| CN1310844A (zh) | 2001-08-29 |
| TW548652B (en) | 2003-08-21 |
| DE19832994A1 (de) | 2000-01-27 |
| DE19832994C2 (de) | 2003-02-13 |
| CN1143316C (zh) | 2004-03-24 |
| US20010012213A1 (en) | 2001-08-09 |
| WO2000005720A1 (de) | 2000-02-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11527551B2 (en) | Memory cell arrangements and methods thereof | |
| JP2002521779A (ja) | 強誘電性記憶装置 | |
| US5959879A (en) | Ferroelectric memory devices having well region word lines and methods of operating same | |
| US5978253A (en) | Methods of operating integrated circuit memory devices having nonvolatile single transistor unit cells therein | |
| KR100663310B1 (ko) | 불휘발성 메모리 | |
| JP3377762B2 (ja) | 強誘電体不揮発性メモリ | |
| US9007823B2 (en) | Semiconductor device | |
| US5963466A (en) | Ferroelectric memory having a common plate electrode | |
| US7561458B2 (en) | Ferroelectric memory array for implementing a zero cancellation scheme to reduce plateline voltage in ferroelectric memory | |
| US6392920B2 (en) | Nonvolatile memory and its driving method | |
| KR100332511B1 (ko) | 강유전체 메모리 장치와 그 구동 방법 | |
| JPH09326200A (ja) | 不揮発性半導体メモリ装置およびその駆動方法 | |
| US6353550B1 (en) | Ferroelectric memory device | |
| US3706891A (en) | A. c. stable storage cell | |
| JP4158010B2 (ja) | 隣接メモリセル間でセルプレートを共有する強誘電体メモリ素子及びその駆動方法 | |
| US6172897B1 (en) | Semiconductor memory and write and read methods of the same | |
| JP2001043694A (ja) | 半導体記憶素子 | |
| JPH08273373A (ja) | 半導体記憶装置とその動作方法 | |
| JP3360471B2 (ja) | 強誘電体記憶装置 | |
| JP3181046B2 (ja) | 不揮発性メモリ | |
| US20040095798A1 (en) | Ferroelectric memory architecture | |
| KR100318440B1 (ko) | 강유전체 메모리 장치 및 그의 구동방법 | |
| KR20010038789A (ko) | 비파괴 읽기 복합형 강유전체 랜덤 액세스 메모리 및 그 작동 방법 | |
| KR20000014807A (ko) | 이중 박막 트랜지스터 비파괴 읽기 강유전체 랜덤 액세스 메모리 및 그 작동방법 | |
| KR20020002549A (ko) | 강유전체 메모리 소자의 기준 전압 발생 장치 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050720 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070926 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20071004 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20071228 |
|
| A524 | Written submission of copy of amendment under article 19 pct |
Free format text: JAPANESE INTERMEDIATE CODE: A524 Effective date: 20071228 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20080305 |
|
| A045 | Written measure of dismissal of application [lapsed due to lack of payment] |
Free format text: JAPANESE INTERMEDIATE CODE: A045 Effective date: 20080723 |