JP2001167592A5 - - Google Patents

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Publication number
JP2001167592A5
JP2001167592A5 JP2000295268A JP2000295268A JP2001167592A5 JP 2001167592 A5 JP2001167592 A5 JP 2001167592A5 JP 2000295268 A JP2000295268 A JP 2000295268A JP 2000295268 A JP2000295268 A JP 2000295268A JP 2001167592 A5 JP2001167592 A5 JP 2001167592A5
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JP
Japan
Prior art keywords
memory cell
semiconductor memory
data
nonvolatile semiconductor
control line
Prior art date
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Application number
JP2000295268A
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English (en)
Japanese (ja)
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JP3920550B2 (ja
JP2001167592A (ja
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Priority to JP2000295268A priority Critical patent/JP3920550B2/ja
Priority claimed from JP2000295268A external-priority patent/JP3920550B2/ja
Publication of JP2001167592A publication Critical patent/JP2001167592A/ja
Publication of JP2001167592A5 publication Critical patent/JP2001167592A5/ja
Application granted granted Critical
Publication of JP3920550B2 publication Critical patent/JP3920550B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2000295268A 1999-09-27 2000-09-27 不揮発性半導体記憶装置 Expired - Fee Related JP3920550B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000295268A JP3920550B2 (ja) 1999-09-27 2000-09-27 不揮発性半導体記憶装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP27233299 1999-09-27
JP11-272332 1999-09-27
JP2000295268A JP3920550B2 (ja) 1999-09-27 2000-09-27 不揮発性半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2001167592A JP2001167592A (ja) 2001-06-22
JP2001167592A5 true JP2001167592A5 (enrdf_load_stackoverflow) 2004-12-02
JP3920550B2 JP3920550B2 (ja) 2007-05-30

Family

ID=26550151

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000295268A Expired - Fee Related JP3920550B2 (ja) 1999-09-27 2000-09-27 不揮発性半導体記憶装置

Country Status (1)

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JP (1) JP3920550B2 (enrdf_load_stackoverflow)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7177197B2 (en) * 2001-09-17 2007-02-13 Sandisk Corporation Latched programming of memory and method
JP3984209B2 (ja) 2003-07-31 2007-10-03 株式会社東芝 半導体記憶装置
JP4519612B2 (ja) * 2004-11-16 2010-08-04 株式会社東芝 不揮発性半導体記憶装置
KR100729351B1 (ko) * 2004-12-31 2007-06-15 삼성전자주식회사 낸드 플래시 메모리 장치 및 그것의 프로그램 방법
JP4836487B2 (ja) * 2005-04-28 2011-12-14 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP5020608B2 (ja) * 2005-11-23 2012-09-05 三星電子株式会社 低負荷ビットライン構造を有する不揮発性半導体メモリ及びそのプログラミング方法
JP4405489B2 (ja) 2006-08-31 2010-01-27 株式会社東芝 不揮発性半導体メモリ
JP5340264B2 (ja) * 2007-04-26 2013-11-13 アギア システムズ インコーポレーテッド エラー訂正機能および効率的なパーシャル・ワード書き込み動作を有するメモリ・デバイス
US7791976B2 (en) * 2008-04-24 2010-09-07 Qualcomm Incorporated Systems and methods for dynamic power savings in electronic memory operation
JP5367641B2 (ja) * 2010-06-03 2013-12-11 株式会社東芝 不揮発性半導体記憶装置
JP6659478B2 (ja) 2016-06-17 2020-03-04 キオクシア株式会社 半導体記憶装置

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