JP2001156269A5 - - Google Patents
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- Publication number
- JP2001156269A5 JP2001156269A5 JP1999336606A JP33660699A JP2001156269A5 JP 2001156269 A5 JP2001156269 A5 JP 2001156269A5 JP 1999336606 A JP1999336606 A JP 1999336606A JP 33660699 A JP33660699 A JP 33660699A JP 2001156269 A5 JP2001156269 A5 JP 2001156269A5
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- contact plug
- bit line
- storage electrode
- interlayer insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000003860 storage Methods 0.000 claims 20
- 239000002184 metal Substances 0.000 claims 17
- 239000011229 interlayer Substances 0.000 claims 16
- 239000004065 semiconductor Substances 0.000 claims 11
- 230000004888 barrier function Effects 0.000 claims 8
- 239000007772 electrode material Substances 0.000 claims 7
- 239000003990 capacitor Substances 0.000 claims 4
- 238000004519 manufacturing process Methods 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 3
- 238000000151 deposition Methods 0.000 claims 1
- 239000011810 insulating material Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33660699A JP4053702B2 (ja) | 1999-11-26 | 1999-11-26 | 半導体記憶装置及びその製造方法 |
| US09/718,389 US6388282B1 (en) | 1999-11-26 | 2000-11-24 | Semiconductor memory device and method of manufacture the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33660699A JP4053702B2 (ja) | 1999-11-26 | 1999-11-26 | 半導体記憶装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001156269A JP2001156269A (ja) | 2001-06-08 |
| JP2001156269A5 true JP2001156269A5 (enExample) | 2005-09-02 |
| JP4053702B2 JP4053702B2 (ja) | 2008-02-27 |
Family
ID=18300905
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33660699A Expired - Fee Related JP4053702B2 (ja) | 1999-11-26 | 1999-11-26 | 半導体記憶装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6388282B1 (enExample) |
| JP (1) | JP4053702B2 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100382730B1 (ko) * | 2000-12-14 | 2003-05-09 | 삼성전자주식회사 | 반도체 소자의 금속 컨택 구조체 및 그 형성방법 |
| KR20030002896A (ko) * | 2001-06-30 | 2003-01-09 | 주식회사 하이닉스반도체 | 캐패시터의 제조 방법 |
| US6756625B2 (en) * | 2002-06-21 | 2004-06-29 | Micron Technology, Inc. | Memory cell and method for forming the same |
| US7045844B2 (en) * | 2002-06-21 | 2006-05-16 | Micron Technology, Inc. | Memory cell and method for forming the same |
| KR100481173B1 (ko) * | 2002-07-12 | 2005-04-07 | 삼성전자주식회사 | 다마신 비트라인공정을 이용한 반도체 메모리장치 및 그의제조방법 |
| US7230292B2 (en) * | 2003-08-05 | 2007-06-12 | Micron Technology, Inc. | Stud electrode and process for making same |
| US20110042722A1 (en) * | 2009-08-21 | 2011-02-24 | Nanya Technology Corp. | Integrated circuit structure and memory array |
| KR101096835B1 (ko) * | 2010-01-08 | 2011-12-22 | 주식회사 하이닉스반도체 | 반도체 소자의 형성 방법 |
| KR20160013765A (ko) * | 2014-07-28 | 2016-02-05 | 삼성전자주식회사 | 반도체 장치 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3749776B2 (ja) * | 1997-02-28 | 2006-03-01 | 株式会社東芝 | 半導体装置 |
| JPH1117116A (ja) | 1997-06-27 | 1999-01-22 | Toshiba Corp | 半導体装置およびその製造方法 |
| US6278152B1 (en) | 1997-06-27 | 2001-08-21 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
-
1999
- 1999-11-26 JP JP33660699A patent/JP4053702B2/ja not_active Expired - Fee Related
-
2000
- 2000-11-24 US US09/718,389 patent/US6388282B1/en not_active Expired - Fee Related
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