JP2000156480A - 半導体集積回路装置およびその製造方法 - Google Patents

半導体集積回路装置およびその製造方法

Info

Publication number
JP2000156480A
JP2000156480A JP10250162A JP25016298A JP2000156480A JP 2000156480 A JP2000156480 A JP 2000156480A JP 10250162 A JP10250162 A JP 10250162A JP 25016298 A JP25016298 A JP 25016298A JP 2000156480 A JP2000156480 A JP 2000156480A
Authority
JP
Japan
Prior art keywords
insulating film
wiring
film
forming
information storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10250162A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000156480A5 (https=
Inventor
Yoshitaka Nakamura
吉孝 中村
Masanari Hirasawa
賢斉 平沢
Isamu Asano
勇 浅野
Takeshi Tamaru
剛 田丸
Satoru Yamada
悟 山田
Keizo Kawakita
惠三 川北
Toshihiro Sekiguchi
敏宏 関口
Yoshitaka Tadaki
▲芳▼▲隆▼ 只木
Takuya Fukuda
琢也 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10250162A priority Critical patent/JP2000156480A/ja
Priority to TW088113676A priority patent/TW451461B/zh
Priority to KR1019990037064A priority patent/KR100681851B1/ko
Priority to US09/389,231 priority patent/US6258649B1/en
Publication of JP2000156480A publication Critical patent/JP2000156480A/ja
Priority to US09/880,959 priority patent/US20010028082A1/en
Priority to US10/335,874 priority patent/US20030132479A1/en
Publication of JP2000156480A5 publication Critical patent/JP2000156480A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H10D64/01125—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides the silicides being formed by chemical reaction with the semiconductor after the contact hole formation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/047—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP10250162A 1998-09-03 1998-09-03 半導体集積回路装置およびその製造方法 Pending JP2000156480A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP10250162A JP2000156480A (ja) 1998-09-03 1998-09-03 半導体集積回路装置およびその製造方法
TW088113676A TW451461B (en) 1998-09-03 1999-08-10 Semiconductor integrated circuit device and method of manufacturing the same
KR1019990037064A KR100681851B1 (ko) 1998-09-03 1999-09-02 반도체집적회로장치 및 그 제조방법
US09/389,231 US6258649B1 (en) 1998-09-03 1999-09-03 Semiconductor integrated circuit device and method of manufacturing the same
US09/880,959 US20010028082A1 (en) 1998-09-03 2001-06-15 Semiconductor integrated circuit device and method of manufacturing the same
US10/335,874 US20030132479A1 (en) 1998-09-03 2003-01-03 Semiconductor integrated circuit device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10250162A JP2000156480A (ja) 1998-09-03 1998-09-03 半導体集積回路装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2000156480A true JP2000156480A (ja) 2000-06-06
JP2000156480A5 JP2000156480A5 (https=) 2004-09-16

Family

ID=17203754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10250162A Pending JP2000156480A (ja) 1998-09-03 1998-09-03 半導体集積回路装置およびその製造方法

Country Status (4)

Country Link
US (3) US6258649B1 (https=)
JP (1) JP2000156480A (https=)
KR (1) KR100681851B1 (https=)
TW (1) TW451461B (https=)

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JP2006013431A (ja) * 2004-06-25 2006-01-12 Samsung Electronics Co Ltd 半導体装置の配線構造体及びその形成方法
KR100770468B1 (ko) * 1999-07-01 2007-10-26 가부시키가이샤 히타치세이사쿠쇼 반도체 집적회로장치의 제조방법
JP2009200508A (ja) * 2002-12-27 2009-09-03 Fujitsu Microelectronics Ltd 半導体装置の製造方法

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JP3472738B2 (ja) * 1999-12-24 2003-12-02 Ｎｅｃエレクトロニクス株式会社 回路製造方法、半導体装置
JP2001185552A (ja) * 1999-12-27 2001-07-06 Hitachi Ltd 半導体集積回路装置およびその製造方法
US20070114631A1 (en) * 2000-01-20 2007-05-24 Hidenori Sato Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device
JP2001203263A (ja) 2000-01-20 2001-07-27 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置
JP2001291844A (ja) 2000-04-06 2001-10-19 Fujitsu Ltd 半導体装置及びその製造方法
KR100331568B1 (ko) * 2000-05-26 2002-04-06 윤종용 반도체 메모리 소자 및 그 제조방법
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US6383868B1 (en) * 2000-08-31 2002-05-07 Micron Technology, Inc. Methods for forming contact and container structures, and integrated circuit devices therefrom
KR100338781B1 (ko) * 2000-09-20 2002-06-01 윤종용 반도체 메모리 소자 및 그의 제조방법
JP2002134715A (ja) * 2000-10-23 2002-05-10 Hitachi Ltd 半導体集積回路装置およびその製造方法
US6617248B1 (en) * 2000-11-10 2003-09-09 Micron Technology, Inc. Method for forming a ruthenium metal layer
KR100354441B1 (en) * 2000-12-27 2002-09-28 Samsung Electronics Co Ltd Method for fabricating spin-on-glass insulation layer of semiconductor device
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JP2004140198A (ja) * 2002-10-18 2004-05-13 Oki Electric Ind Co Ltd 半導体装置およびその製造方法
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JP4591809B2 (ja) * 2003-06-27 2010-12-01 エルピーダメモリ株式会社 微細化に対応したメモリアレイ領域のレイアウト方法
JP4658486B2 (ja) * 2003-06-30 2011-03-23 ルネサスエレクトロニクス株式会社 半導体装置とその製造方法
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JP4897201B2 (ja) * 2004-05-31 2012-03-14 ルネサスエレクトロニクス株式会社 半導体装置
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JP4205734B2 (ja) * 2006-05-25 2009-01-07 エルピーダメモリ株式会社 半導体装置の製造方法
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JP2009200508A (ja) * 2002-12-27 2009-09-03 Fujitsu Microelectronics Ltd 半導体装置の製造方法
JP2006013431A (ja) * 2004-06-25 2006-01-12 Samsung Electronics Co Ltd 半導体装置の配線構造体及びその形成方法

Also Published As

Publication number Publication date
KR20000022861A (ko) 2000-04-25
US6258649B1 (en) 2001-07-10
KR100681851B1 (ko) 2007-02-12
US20010028082A1 (en) 2001-10-11
US20030132479A1 (en) 2003-07-17
TW451461B (en) 2001-08-21

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