JP2000036190A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JP2000036190A JP2000036190A JP10203456A JP20345698A JP2000036190A JP 2000036190 A JP2000036190 A JP 2000036190A JP 10203456 A JP10203456 A JP 10203456A JP 20345698 A JP20345698 A JP 20345698A JP 2000036190 A JP2000036190 A JP 2000036190A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- precharge
- circuit
- precharge power
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10203456A JP2000036190A (ja) | 1998-07-17 | 1998-07-17 | 半導体装置 |
| US09/353,856 US6081468A (en) | 1998-07-17 | 1999-07-15 | Semiconductor device |
| TW088112110A TW436787B (en) | 1998-07-17 | 1999-07-16 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10203456A JP2000036190A (ja) | 1998-07-17 | 1998-07-17 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000036190A true JP2000036190A (ja) | 2000-02-02 |
| JP2000036190A5 JP2000036190A5 (enExample) | 2005-04-28 |
Family
ID=16474434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10203456A Pending JP2000036190A (ja) | 1998-07-17 | 1998-07-17 | 半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6081468A (enExample) |
| JP (1) | JP2000036190A (enExample) |
| TW (1) | TW436787B (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6842388B2 (en) | 2001-11-20 | 2005-01-11 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory device with bit line precharge voltage generating circuit |
| JP2015167058A (ja) * | 2014-03-03 | 2015-09-24 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| JP2016131373A (ja) * | 2011-05-06 | 2016-07-21 | 株式会社半導体エネルギー研究所 | 記憶装置 |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000195262A (ja) * | 1998-12-25 | 2000-07-14 | Internatl Business Mach Corp <Ibm> | Sdram及びsdramのデ―タ・アクセス方法 |
| KR100381968B1 (ko) * | 1998-12-30 | 2004-03-24 | 주식회사 하이닉스반도체 | 고속동작용디램 |
| KR100326085B1 (ko) * | 2000-02-24 | 2002-03-07 | 윤종용 | 반도체 메모리 장치의 자동 프리차지 제어신호 발생회로및 자동 프리차지 제어방법 |
| US6532185B2 (en) | 2001-02-23 | 2003-03-11 | International Business Machines Corporation | Distribution of bank accesses in a multiple bank DRAM used as a data buffer |
| US6590822B2 (en) * | 2001-05-07 | 2003-07-08 | Samsung Electronics Co., Ltd. | System and method for performing partial array self-refresh operation in a semiconductor memory device |
| US6728159B2 (en) * | 2001-12-21 | 2004-04-27 | International Business Machines Corporation | Flexible multibanking interface for embedded memory applications |
| KR100605606B1 (ko) * | 2003-05-29 | 2006-07-28 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 동기식 셀프 리프레쉬 제어 방법 및제어 회로 |
| JP2007265552A (ja) * | 2006-03-29 | 2007-10-11 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| KR100825022B1 (ko) * | 2006-08-31 | 2008-04-24 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그 구동방법 |
| US7986577B2 (en) * | 2007-03-19 | 2011-07-26 | Hynix Semiconductor Inc. | Precharge voltage supplying circuit |
| ITMI20082344A1 (it) * | 2008-12-30 | 2010-06-30 | St Microelectronics Srl | Metodo per indicizzare piastrine comprendenti circuiti integrati |
| KR102529187B1 (ko) * | 2016-03-31 | 2023-05-04 | 삼성전자주식회사 | 복수의 통신 규격들을 지원하는 수신 인터페이스 회로 및 이를 포함하는 메모리 시스템 |
| KR102475458B1 (ko) * | 2016-05-30 | 2022-12-08 | 에스케이하이닉스 주식회사 | 파워 온 리셋 회로 및 이를 포함하는 반도체 메모리 장치 |
| US10304522B2 (en) | 2017-01-31 | 2019-05-28 | International Business Machines Corporation | Method for low power operation and test using DRAM device |
| US9916890B1 (en) | 2017-02-21 | 2018-03-13 | International Business Machines Corporation | Predicting data correlation using multivalued logical outputs in static random access memory (SRAM) storage cells |
| US10037792B1 (en) | 2017-06-02 | 2018-07-31 | International Business Machines Corporation | Optimizing data approximation analysis using low power circuitry |
| US10663502B2 (en) | 2017-06-02 | 2020-05-26 | International Business Machines Corporation | Real time cognitive monitoring of correlations between variables |
| US11526768B2 (en) | 2017-06-02 | 2022-12-13 | International Business Machines Corporation | Real time cognitive reasoning using a circuit with varying confidence level alerts |
| US10598710B2 (en) | 2017-06-02 | 2020-03-24 | International Business Machines Corporation | Cognitive analysis using applied analog circuits |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0594694A (ja) * | 1991-10-01 | 1993-04-16 | Matsushita Electron Corp | プリチヤージ回路 |
| KR0158027B1 (ko) * | 1993-12-29 | 1999-02-01 | 모리시다 요이치 | 반도체집적회로 |
| JP3241280B2 (ja) * | 1996-11-19 | 2001-12-25 | 株式会社東芝 | ダイナミック型半導体記憶装置 |
| JP3895838B2 (ja) * | 1997-09-10 | 2007-03-22 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
-
1998
- 1998-07-17 JP JP10203456A patent/JP2000036190A/ja active Pending
-
1999
- 1999-07-15 US US09/353,856 patent/US6081468A/en not_active Expired - Lifetime
- 1999-07-16 TW TW088112110A patent/TW436787B/zh not_active IP Right Cessation
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6842388B2 (en) | 2001-11-20 | 2005-01-11 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory device with bit line precharge voltage generating circuit |
| KR100498218B1 (ko) * | 2001-11-20 | 2005-07-01 | 마쯔시다덴기산교 가부시키가이샤 | 반도체 기억 장치 |
| JP2016131373A (ja) * | 2011-05-06 | 2016-07-21 | 株式会社半導体エネルギー研究所 | 記憶装置 |
| JP2015167058A (ja) * | 2014-03-03 | 2015-09-24 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US9928901B2 (en) | 2014-03-03 | 2018-03-27 | Renesas Electronics Corporation | SRAM with first and second precharge circuits |
| US10068641B2 (en) | 2014-03-03 | 2018-09-04 | Renesas Electronics Corporation | Semiconductor storage device |
| US10325650B2 (en) | 2014-03-03 | 2019-06-18 | Renesas Electronics Corporation | Semiconductor storage device |
Also Published As
| Publication number | Publication date |
|---|---|
| US6081468A (en) | 2000-06-27 |
| TW436787B (en) | 2001-05-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040623 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040623 |
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| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070719 |
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| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070724 |
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| A02 | Decision of refusal |
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