TW436787B - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
TW436787B
TW436787B TW088112110A TW88112110A TW436787B TW 436787 B TW436787 B TW 436787B TW 088112110 A TW088112110 A TW 088112110A TW 88112110 A TW88112110 A TW 88112110A TW 436787 B TW436787 B TW 436787B
Authority
TW
Taiwan
Prior art keywords
circuit
precharge
power supply
charging
power
Prior art date
Application number
TW088112110A
Other languages
English (en)
Chinese (zh)
Inventor
Takashi Taira
Kimimasa Imai
Original Assignee
Tokyo Shibaura Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co filed Critical Tokyo Shibaura Electric Co
Application granted granted Critical
Publication of TW436787B publication Critical patent/TW436787B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
TW088112110A 1998-07-17 1999-07-16 Semiconductor device TW436787B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10203456A JP2000036190A (ja) 1998-07-17 1998-07-17 半導体装置

Publications (1)

Publication Number Publication Date
TW436787B true TW436787B (en) 2001-05-28

Family

ID=16474434

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088112110A TW436787B (en) 1998-07-17 1999-07-16 Semiconductor device

Country Status (3)

Country Link
US (1) US6081468A (enExample)
JP (1) JP2000036190A (enExample)
TW (1) TW436787B (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000195262A (ja) * 1998-12-25 2000-07-14 Internatl Business Mach Corp <Ibm> Ｓｄｒａｍ及びｓｄｒａｍのデ―タ・アクセス方法
KR100381968B1 (ko) * 1998-12-30 2004-03-24 주식회사 하이닉스반도체 고속동작용디램
KR100326085B1 (ko) * 2000-02-24 2002-03-07 윤종용 반도체 메모리 장치의 자동 프리차지 제어신호 발생회로및 자동 프리차지 제어방법
US6532185B2 (en) 2001-02-23 2003-03-11 International Business Machines Corporation Distribution of bank accesses in a multiple bank DRAM used as a data buffer
US6590822B2 (en) * 2001-05-07 2003-07-08 Samsung Electronics Co., Ltd. System and method for performing partial array self-refresh operation in a semiconductor memory device
JP3753972B2 (ja) * 2001-11-20 2006-03-08 松下電器産業株式会社 半導体記憶装置
US6728159B2 (en) * 2001-12-21 2004-04-27 International Business Machines Corporation Flexible multibanking interface for embedded memory applications
KR100605606B1 (ko) * 2003-05-29 2006-07-28 주식회사 하이닉스반도체 반도체 메모리 장치의 동기식 셀프 리프레쉬 제어 방법 및제어 회로
JP2007265552A (ja) * 2006-03-29 2007-10-11 Matsushita Electric Ind Co Ltd 半導体記憶装置
KR100825022B1 (ko) * 2006-08-31 2008-04-24 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 구동방법
US7986577B2 (en) * 2007-03-19 2011-07-26 Hynix Semiconductor Inc. Precharge voltage supplying circuit
ITMI20082344A1 (it) * 2008-12-30 2010-06-30 St Microelectronics Srl Metodo per indicizzare piastrine comprendenti circuiti integrati
KR101874144B1 (ko) * 2011-05-06 2018-07-03 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기억 장치
JP6353668B2 (ja) 2014-03-03 2018-07-04 ルネサスエレクトロニクス株式会社 半導体記憶装置
KR102529187B1 (ko) * 2016-03-31 2023-05-04 삼성전자주식회사 복수의 통신 규격들을 지원하는 수신 인터페이스 회로 및 이를 포함하는 메모리 시스템
KR102475458B1 (ko) * 2016-05-30 2022-12-08 에스케이하이닉스 주식회사 파워 온 리셋 회로 및 이를 포함하는 반도체 메모리 장치
US10304522B2 (en) 2017-01-31 2019-05-28 International Business Machines Corporation Method for low power operation and test using DRAM device
US9916890B1 (en) 2017-02-21 2018-03-13 International Business Machines Corporation Predicting data correlation using multivalued logical outputs in static random access memory (SRAM) storage cells
US10037792B1 (en) 2017-06-02 2018-07-31 International Business Machines Corporation Optimizing data approximation analysis using low power circuitry
US10598710B2 (en) 2017-06-02 2020-03-24 International Business Machines Corporation Cognitive analysis using applied analog circuits
US11526768B2 (en) 2017-06-02 2022-12-13 International Business Machines Corporation Real time cognitive reasoning using a circuit with varying confidence level alerts
US10663502B2 (en) 2017-06-02 2020-05-26 International Business Machines Corporation Real time cognitive monitoring of correlations between variables

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0594694A (ja) * 1991-10-01 1993-04-16 Matsushita Electron Corp プリチヤージ回路
KR0158027B1 (ko) * 1993-12-29 1999-02-01 모리시다 요이치 반도체집적회로
JP3241280B2 (ja) * 1996-11-19 2001-12-25 株式会社東芝 ダイナミック型半導体記憶装置
JP3895838B2 (ja) * 1997-09-10 2007-03-22 株式会社ルネサステクノロジ 半導体記憶装置

Also Published As

Publication number Publication date
US6081468A (en) 2000-06-27
JP2000036190A (ja) 2000-02-02

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GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees