JP2000011646A5 - - Google Patents

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Publication number
JP2000011646A5
JP2000011646A5 JP1998178315A JP17831598A JP2000011646A5 JP 2000011646 A5 JP2000011646 A5 JP 2000011646A5 JP 1998178315 A JP1998178315 A JP 1998178315A JP 17831598 A JP17831598 A JP 17831598A JP 2000011646 A5 JP2000011646 A5 JP 2000011646A5
Authority
JP
Japan
Prior art keywords
strobe signal
output
complementary
input
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1998178315A
Other languages
English (en)
Japanese (ja)
Other versions
JP4075140B2 (ja
JP2000011646A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP17831598A priority Critical patent/JP4075140B2/ja
Priority claimed from JP17831598A external-priority patent/JP4075140B2/ja
Priority to US09/338,597 priority patent/US6172938B1/en
Priority to TW088110642A priority patent/TW411413B/zh
Priority to KR1019990023965A priority patent/KR100566752B1/ko
Publication of JP2000011646A publication Critical patent/JP2000011646A/ja
Publication of JP2000011646A5 publication Critical patent/JP2000011646A5/ja
Application granted granted Critical
Publication of JP4075140B2 publication Critical patent/JP4075140B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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JP17831598A 1998-06-25 1998-06-25 電子装置及び半導体記憶装置 Expired - Lifetime JP4075140B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP17831598A JP4075140B2 (ja) 1998-06-25 1998-06-25 電子装置及び半導体記憶装置
US09/338,597 US6172938B1 (en) 1998-06-25 1999-06-23 Electronic instrument and semiconductor memory device
TW088110642A TW411413B (en) 1998-06-25 1999-06-24 Electronic instrument and semiconductor memory device
KR1019990023965A KR100566752B1 (ko) 1998-06-25 1999-06-24 전자 장치 및 반도체 기억 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17831598A JP4075140B2 (ja) 1998-06-25 1998-06-25 電子装置及び半導体記憶装置

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2000053281A Division JP3348716B2 (ja) 1998-06-25 2000-02-29 半導体記憶装置
JP2007311913A Division JP4600467B2 (ja) 2007-12-03 2007-12-03 電子装置及びダブル・データ・レート・シンクロナス・ダイナミック・ランダム・アクセス・メモリ

Publications (3)

Publication Number Publication Date
JP2000011646A JP2000011646A (ja) 2000-01-14
JP2000011646A5 true JP2000011646A5 (enExample) 2004-12-02
JP4075140B2 JP4075140B2 (ja) 2008-04-16

Family

ID=16046339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17831598A Expired - Lifetime JP4075140B2 (ja) 1998-06-25 1998-06-25 電子装置及び半導体記憶装置

Country Status (4)

Country Link
US (1) US6172938B1 (enExample)
JP (1) JP4075140B2 (enExample)
KR (1) KR100566752B1 (enExample)
TW (1) TW411413B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4683690B2 (ja) * 1999-11-05 2011-05-18 ルネサスエレクトロニクス株式会社 半導体装置
US6807613B1 (en) * 2000-08-21 2004-10-19 Mircon Technology, Inc. Synchronized write data on a high speed memory bus
US6388943B1 (en) * 2001-01-29 2002-05-14 Advanced Micro Devices, Inc. Differential clock crossing point level-shifting device
US6515914B2 (en) 2001-03-21 2003-02-04 Micron Technology, Inc. Memory device and method having data path with multiple prefetch I/O configurations
US7102937B2 (en) * 2004-07-07 2006-09-05 Micron Technology, Inc. Solution to DQS postamble ringing problem in memory chips
KR100640783B1 (ko) * 2004-10-30 2006-11-01 주식회사 하이닉스반도체 노이즈를 줄일 수 있는 데이터 출력 드라이버
US20060115016A1 (en) * 2004-11-12 2006-06-01 Ati Technologies Inc. Methods and apparatus for transmitting and receiving data signals
US7262637B2 (en) * 2005-03-22 2007-08-28 Micron Technology, Inc. Output buffer and method having a supply voltage insensitive slew rate
JP4544115B2 (ja) * 2005-09-22 2010-09-15 パナソニック電工株式会社 床置き畳台
JP4600467B2 (ja) * 2007-12-03 2010-12-15 富士通セミコンダクター株式会社 電子装置及びダブル・データ・レート・シンクロナス・ダイナミック・ランダム・アクセス・メモリ
US7889579B2 (en) * 2008-01-28 2011-02-15 Promos Technologies Pte. Ltd. Using differential data strobes in non-differential mode to enhance data capture window
JP5489427B2 (ja) * 2008-06-27 2014-05-14 スパンション エルエルシー メモリ制御装置、メモリシステムおよびメモリ装置の制御方法。
KR101796116B1 (ko) 2010-10-20 2017-11-10 삼성전자 주식회사 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법
KR102076858B1 (ko) * 2013-12-24 2020-02-12 에스케이하이닉스 주식회사 반도체장치 및 이를 포함하는 반도체시스템
CN115240748B (zh) * 2021-04-23 2025-08-29 长鑫存储技术有限公司 存储芯片测试方法、计算机设备及介质
EP4099330B1 (en) 2021-04-23 2025-04-09 Changxin Memory Technologies, Inc. Memory chip testing method, computer device and medium

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2572791B2 (ja) * 1987-11-26 1997-01-16 三菱電機株式会社 半導体記憶装置
JPH0715312A (ja) * 1993-06-15 1995-01-17 Fujitsu Ltd 半導体記憶装置
US5666321A (en) * 1995-09-01 1997-09-09 Micron Technology, Inc. Synchronous DRAM memory with asynchronous column decode
KR100192573B1 (ko) * 1995-09-18 1999-06-15 윤종용 멀티 뱅크 구조의 반도체 메모리 장치
KR100214262B1 (ko) * 1995-10-25 1999-08-02 김영환 메모리 장치
KR100216676B1 (ko) * 1996-06-29 1999-09-01 김영환 스트로브클럭신호 생성을 위한 장치를 갖는 동기식 반도체장치
KR100224681B1 (ko) * 1997-01-10 1999-10-15 윤종용 반도체 메모리 장치의 로우 어드레스 제어 회로
US6016066A (en) * 1998-03-19 2000-01-18 Intel Corporation Method and apparatus for glitch protection for input buffers in a source-synchronous environment
KR100306881B1 (ko) * 1998-04-02 2001-10-29 박종섭 동기 반도체 메모리를 위한 인터페이스

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