KR100566752B1 - 전자 장치 및 반도체 기억 장치 - Google Patents

전자 장치 및 반도체 기억 장치 Download PDF

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Publication number
KR100566752B1
KR100566752B1 KR1019990023965A KR19990023965A KR100566752B1 KR 100566752 B1 KR100566752 B1 KR 100566752B1 KR 1019990023965 A KR1019990023965 A KR 1019990023965A KR 19990023965 A KR19990023965 A KR 19990023965A KR 100566752 B1 KR100566752 B1 KR 100566752B1
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KR
South Korea
Prior art keywords
strobe signal
output
input
data
strobe
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KR1019990023965A
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English (en)
Korean (ko)
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KR20000006420A (ko
Inventor
스즈키다카아키
다구치마사오
사토고토쿠
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후지쯔 가부시끼가이샤
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066—Output synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
KR1019990023965A 1998-06-25 1999-06-24 전자 장치 및 반도체 기억 장치 Expired - Lifetime KR100566752B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP17831598A JP4075140B2 (ja) 1998-06-25 1998-06-25 電子装置及び半導体記憶装置
JP98-178315 1998-06-25

Publications (2)

Publication Number Publication Date
KR20000006420A KR20000006420A (ko) 2000-01-25
KR100566752B1 true KR100566752B1 (ko) 2006-04-03

Family

ID=16046339

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990023965A Expired - Lifetime KR100566752B1 (ko) 1998-06-25 1999-06-24 전자 장치 및 반도체 기억 장치

Country Status (4)

Country Link
US (1) US6172938B1 (enExample)
JP (1) JP4075140B2 (enExample)
KR (1) KR100566752B1 (enExample)
TW (1) TW411413B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4683690B2 (ja) * 1999-11-05 2011-05-18 ルネサスエレクトロニクス株式会社 半導体装置
US6807613B1 (en) * 2000-08-21 2004-10-19 Mircon Technology, Inc. Synchronized write data on a high speed memory bus
US6388943B1 (en) * 2001-01-29 2002-05-14 Advanced Micro Devices, Inc. Differential clock crossing point level-shifting device
US6515914B2 (en) 2001-03-21 2003-02-04 Micron Technology, Inc. Memory device and method having data path with multiple prefetch I/O configurations
US7102937B2 (en) * 2004-07-07 2006-09-05 Micron Technology, Inc. Solution to DQS postamble ringing problem in memory chips
KR100640783B1 (ko) * 2004-10-30 2006-11-01 주식회사 하이닉스반도체 노이즈를 줄일 수 있는 데이터 출력 드라이버
US20060115016A1 (en) * 2004-11-12 2006-06-01 Ati Technologies Inc. Methods and apparatus for transmitting and receiving data signals
US7262637B2 (en) * 2005-03-22 2007-08-28 Micron Technology, Inc. Output buffer and method having a supply voltage insensitive slew rate
JP4544115B2 (ja) * 2005-09-22 2010-09-15 パナソニック電工株式会社 床置き畳台
JP4600467B2 (ja) * 2007-12-03 2010-12-15 富士通セミコンダクター株式会社 電子装置及びダブル・データ・レート・シンクロナス・ダイナミック・ランダム・アクセス・メモリ
US7889579B2 (en) * 2008-01-28 2011-02-15 Promos Technologies Pte. Ltd. Using differential data strobes in non-differential mode to enhance data capture window
JP5489427B2 (ja) * 2008-06-27 2014-05-14 スパンション エルエルシー メモリ制御装置、メモリシステムおよびメモリ装置の制御方法。
KR101796116B1 (ko) 2010-10-20 2017-11-10 삼성전자 주식회사 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법
KR102076858B1 (ko) * 2013-12-24 2020-02-12 에스케이하이닉스 주식회사 반도체장치 및 이를 포함하는 반도체시스템
CN115240748B (zh) * 2021-04-23 2025-08-29 长鑫存储技术有限公司 存储芯片测试方法、计算机设备及介质
EP4099330B1 (en) 2021-04-23 2025-04-09 Changxin Memory Technologies, Inc. Memory chip testing method, computer device and medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01138684A (ja) * 1987-11-26 1989-05-31 Mitsubishi Electric Corp 半導体記憶装置
US5666321A (en) * 1995-09-01 1997-09-09 Micron Technology, Inc. Synchronous DRAM memory with asynchronous column decode
KR980006858A (ko) * 1996-06-29 1998-03-30 김주용 스트로브 클럭신호 생성장치 및 그를 사용하는 동기식 반도체 장치
KR19990082815A (ko) * 1998-04-02 1999-11-25 김영환 동기반도체메모리를위한인터페이스

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715312A (ja) * 1993-06-15 1995-01-17 Fujitsu Ltd 半導体記憶装置
KR100192573B1 (ko) * 1995-09-18 1999-06-15 윤종용 멀티 뱅크 구조의 반도체 메모리 장치
KR100214262B1 (ko) * 1995-10-25 1999-08-02 김영환 메모리 장치
KR100224681B1 (ko) * 1997-01-10 1999-10-15 윤종용 반도체 메모리 장치의 로우 어드레스 제어 회로
US6016066A (en) * 1998-03-19 2000-01-18 Intel Corporation Method and apparatus for glitch protection for input buffers in a source-synchronous environment

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01138684A (ja) * 1987-11-26 1989-05-31 Mitsubishi Electric Corp 半導体記憶装置
US5666321A (en) * 1995-09-01 1997-09-09 Micron Technology, Inc. Synchronous DRAM memory with asynchronous column decode
KR980006858A (ko) * 1996-06-29 1998-03-30 김주용 스트로브 클럭신호 생성장치 및 그를 사용하는 동기식 반도체 장치
KR19990082815A (ko) * 1998-04-02 1999-11-25 김영환 동기반도체메모리를위한인터페이스

Also Published As

Publication number Publication date
JP4075140B2 (ja) 2008-04-16
KR20000006420A (ko) 2000-01-25
TW411413B (en) 2000-11-11
JP2000011646A (ja) 2000-01-14
US6172938B1 (en) 2001-01-09

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