ITRM910712A0 - Circuito di generazione di alta tensione per un circuito di memoria a semiconduttori. - Google Patents

Circuito di generazione di alta tensione per un circuito di memoria a semiconduttori.

Info

Publication number
ITRM910712A0
ITRM910712A0 IT91RM712A ITRM910712A ITRM910712A0 IT RM910712 A0 ITRM910712 A0 IT RM910712A0 IT 91RM712 A IT91RM712 A IT 91RM712A IT RM910712 A ITRM910712 A IT RM910712A IT RM910712 A0 ITRM910712 A0 IT RM910712A0
Authority
IT
Italy
Prior art keywords
high voltage
semiconductor memory
voltage generation
circuit
generation circuit
Prior art date
Application number
IT91RM712A
Other languages
English (en)
Inventor
Jin-Gi Kim
Woong-Mu Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITRM910712A0 publication Critical patent/ITRM910712A0/it
Publication of ITRM910712A1 publication Critical patent/ITRM910712A1/it
Application granted granted Critical
Publication of IT1250777B publication Critical patent/IT1250777B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/073—Charge pumps of the Schenkel-type
ITRM910712A 1990-09-25 1991-09-24 Circuito di generazione di alta tensione per un circuito di memoria a semiconduttori. IT1250777B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900015225A KR920006991A (ko) 1990-09-25 1990-09-25 반도체메모리 장치의 고전압발생회로

Publications (3)

Publication Number Publication Date
ITRM910712A0 true ITRM910712A0 (it) 1991-09-24
ITRM910712A1 ITRM910712A1 (it) 1992-03-26
IT1250777B IT1250777B (it) 1995-04-21

Family

ID=19303989

Family Applications (1)

Application Number Title Priority Date Filing Date
ITRM910712A IT1250777B (it) 1990-09-25 1991-09-24 Circuito di generazione di alta tensione per un circuito di memoria a semiconduttori.

Country Status (6)

Country Link
US (1) US5276646A (it)
JP (1) JPH07122998B2 (it)
KR (1) KR920006991A (it)
DE (1) DE4036973C2 (it)
FR (1) FR2667169B1 (it)
IT (1) IT1250777B (it)

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Also Published As

Publication number Publication date
JPH07122998B2 (ja) 1995-12-25
JPH04132088A (ja) 1992-05-06
FR2667169B1 (fr) 1994-04-15
US5276646A (en) 1994-01-04
ITRM910712A1 (it) 1992-03-26
DE4036973A1 (de) 1992-04-02
DE4036973C2 (de) 1994-06-30
FR2667169A1 (fr) 1992-03-27
KR920006991A (ko) 1992-04-28
IT1250777B (it) 1995-04-21

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Effective date: 19970829