ITMI951994A0 - Procedimento e dispositivo per fabbricare un circuito integrato a semiconduttori - Google Patents

Procedimento e dispositivo per fabbricare un circuito integrato a semiconduttori

Info

Publication number
ITMI951994A0
ITMI951994A0 ITMI951994A ITMI951994A ITMI951994A0 IT MI951994 A0 ITMI951994 A0 IT MI951994A0 IT MI951994 A ITMI951994 A IT MI951994A IT MI951994 A ITMI951994 A IT MI951994A IT MI951994 A0 ITMI951994 A0 IT MI951994A0
Authority
IT
Italy
Prior art keywords
manufactureing
procedure
integrated circuit
semiconductor integrated
semiconductor
Prior art date
Application number
ITMI951994A
Other languages
English (en)
Inventor
Shigeru Harada
Original Assignee
Shigeru Harada
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=17908174&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ITMI951994(A0) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Shigeru Harada filed Critical Shigeru Harada
Publication of ITMI951994A0 publication Critical patent/ITMI951994A0/it
Publication of ITMI951994A1 publication Critical patent/ITMI951994A1/it
Application granted granted Critical
Publication of IT1277670B1 publication Critical patent/IT1277670B1/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/906—Cleaning of wafer as interim step
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/963—Removing process residues from vertical substrate surfaces

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
IT95MI001994A 1994-12-06 1995-09-29 Procedimento e dispositivo per fabbricare un circuito integrato a semiconduttori IT1277670B1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6302377A JPH08162425A (ja) 1994-12-06 1994-12-06 半導体集積回路装置の製造方法および製造装置

Publications (3)

Publication Number Publication Date
ITMI951994A0 true ITMI951994A0 (it) 1995-09-29
ITMI951994A1 ITMI951994A1 (it) 1997-03-29
IT1277670B1 IT1277670B1 (it) 1997-11-11

Family

ID=17908174

Family Applications (1)

Application Number Title Priority Date Filing Date
IT95MI001994A IT1277670B1 (it) 1994-12-06 1995-09-29 Procedimento e dispositivo per fabbricare un circuito integrato a semiconduttori

Country Status (6)

Country Link
US (2) US6178972B1 (it)
JP (1) JPH08162425A (it)
KR (1) KR0180283B1 (it)
DE (1) DE19521389C2 (it)
IT (1) IT1277670B1 (it)
TW (1) TW410406B (it)

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US6039059A (en) 1996-09-30 2000-03-21 Verteq, Inc. Wafer cleaning system
US6296714B1 (en) * 1997-01-16 2001-10-02 Mitsubishi Materials Silicon Corporation Washing solution of semiconductor substrate and washing method using the same
US20020157686A1 (en) * 1997-05-09 2002-10-31 Semitool, Inc. Process and apparatus for treating a workpiece such as a semiconductor wafer
JPH11200050A (ja) 1998-01-14 1999-07-27 Mitsubishi Electric Corp タングステンシリサイド膜の形成方法、半導体装置の製造方法、及び半導体ウェーハ処理装置
US6664196B1 (en) 1999-03-15 2003-12-16 Matsushita Electric Industrial Co., Ltd. Method of cleaning electronic device and method of fabricating the same
US6429144B1 (en) * 1999-12-28 2002-08-06 Koninklijke Philips Electronics N.V. Integrated circuit manufacture method with aqueous hydrogen fluoride and nitric acid oxide etch
US7479205B2 (en) 2000-09-22 2009-01-20 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus
US6951221B2 (en) 2000-09-22 2005-10-04 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus
JP2002170792A (ja) * 2000-11-29 2002-06-14 Mitsubishi Electric Corp 研磨液供給装置及び研磨液供給方法、研磨装置及び研磨方法、並びに、半導体装置の製造方法
US6635565B2 (en) * 2001-02-20 2003-10-21 United Microelectronics Corp. Method of cleaning a dual damascene structure
JP4609616B2 (ja) * 2001-06-18 2011-01-12 三菱瓦斯化学株式会社 半導体装置用洗浄剤
US8337537B2 (en) 2001-07-16 2012-12-25 Depuy Products, Inc. Device from naturally occurring biologically derived materials
JP4101609B2 (ja) * 2001-12-07 2008-06-18 大日本スクリーン製造株式会社 基板処理方法
JP2003340386A (ja) * 2002-05-23 2003-12-02 Toshiba Corp 超音波洗浄装置及び超音波洗浄方法
US6927159B2 (en) * 2003-05-27 2005-08-09 Texas Instruments Incorporated Methods for providing improved layer adhesion in a semiconductor device
KR100734669B1 (ko) * 2003-08-08 2007-07-02 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법 및 그 장치
JP2005183407A (ja) * 2003-11-26 2005-07-07 Seiko Instruments Inc 半導体装置とその製造方法
US20060008746A1 (en) * 2004-07-07 2006-01-12 Yasunobu Onishi Method for manufacturing semiconductor device
TWI352628B (en) * 2006-07-21 2011-11-21 Akrion Technologies Inc Nozzle for use in the megasonic cleaning of substr
KR20100077859A (ko) * 2008-12-29 2010-07-08 주식회사 동부하이텍 경화 폴리머 레지듀 제거 방법
JP5787251B2 (ja) * 2011-02-28 2015-09-30 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
CN108630575B (zh) * 2017-03-17 2022-08-09 铠侠股份有限公司 基板处理装置及基板处理方法

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Also Published As

Publication number Publication date
KR960026642A (ko) 1996-07-22
DE19521389C2 (de) 2001-06-07
US6283835B1 (en) 2001-09-04
US20010000199A1 (en) 2001-04-12
TW410406B (en) 2000-11-01
ITMI951994A1 (it) 1997-03-29
US6178972B1 (en) 2001-01-30
IT1277670B1 (it) 1997-11-11
DE19521389A1 (de) 1996-06-13
KR0180283B1 (ko) 1999-04-15
JPH08162425A (ja) 1996-06-21

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