ITMI932044A1 - Metodo di fabbricazione di un dispositivo a semiconduttore - Google Patents

Metodo di fabbricazione di un dispositivo a semiconduttore

Info

Publication number
ITMI932044A1
ITMI932044A1 IT002044A ITMI932044A ITMI932044A1 IT MI932044 A1 ITMI932044 A1 IT MI932044A1 IT 002044 A IT002044 A IT 002044A IT MI932044 A ITMI932044 A IT MI932044A IT MI932044 A1 ITMI932044 A1 IT MI932044A1
Authority
IT
Italy
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Application number
IT002044A
Other languages
English (en)
Inventor
Soo-Kwan Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI932044A0 publication Critical patent/ITMI932044A0/it
Publication of ITMI932044A1 publication Critical patent/ITMI932044A1/it
Application granted granted Critical
Publication of IT1272674B publication Critical patent/IT1272674B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
ITMI932044A 1992-09-26 1993-09-24 Metodo di fabbricazione di un dispositivo a semiconduttore IT1272674B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR920017608 1992-09-26

Publications (3)

Publication Number Publication Date
ITMI932044A0 ITMI932044A0 (it) 1993-09-24
ITMI932044A1 true ITMI932044A1 (it) 1995-03-24
IT1272674B IT1272674B (it) 1997-06-26

Family

ID=19340175

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI932044A IT1272674B (it) 1992-09-26 1993-09-24 Metodo di fabbricazione di un dispositivo a semiconduttore

Country Status (5)

Country Link
JP (1) JPH06209049A (it)
CN (1) CN1087446A (it)
DE (1) DE4332605A1 (it)
GB (1) GB2271467A (it)
IT (1) IT1272674B (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004172259A (ja) 2002-11-19 2004-06-17 Oki Electric Ind Co Ltd 半導体素子の製造方法
KR100650858B1 (ko) * 2005-12-23 2006-11-28 주식회사 하이닉스반도체 플래쉬 메모리 소자의 제조 방법
JP5029257B2 (ja) * 2007-01-17 2012-09-19 東京エレクトロン株式会社 載置台構造及び処理装置
CN104810263B (zh) * 2014-01-24 2018-11-20 北大方正集团有限公司 栅氧化层的制造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4139658A (en) * 1976-06-23 1979-02-13 Rca Corp. Process for manufacturing a radiation hardened oxide
DE3206376A1 (de) * 1982-02-22 1983-09-01 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung von siliziumoxidschichten

Also Published As

Publication number Publication date
GB2271467A (en) 1994-04-13
ITMI932044A0 (it) 1993-09-24
DE4332605A1 (de) 1994-03-31
CN1087446A (zh) 1994-06-01
IT1272674B (it) 1997-06-26
JPH06209049A (ja) 1994-07-26
GB9319730D0 (en) 1993-11-10

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Legal Events

Date Code Title Description
0001 Granted