IT948918B - Procedimento per fabbricare circui ti integrati con isolamento ossida to e struttura risultante - Google Patents

Procedimento per fabbricare circui ti integrati con isolamento ossida to e struttura risultante

Info

Publication number
IT948918B
IT948918B IT67198/72A IT6719872A IT948918B IT 948918 B IT948918 B IT 948918B IT 67198/72 A IT67198/72 A IT 67198/72A IT 6719872 A IT6719872 A IT 6719872A IT 948918 B IT948918 B IT 948918B
Authority
IT
Italy
Prior art keywords
procedure
integrated circuits
resulting structure
manufacturing integrated
oxidized insulation
Prior art date
Application number
IT67198/72A
Other languages
English (en)
Original Assignee
Fairchild Camera Instr Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22341356&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=IT948918(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Fairchild Camera Instr Co filed Critical Fairchild Camera Instr Co
Application granted granted Critical
Publication of IT948918B publication Critical patent/IT948918B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0635—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821—Collector regions of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/8605—Resistors with PN junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/03—Diffusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/145—Shaped junctions

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
IT67198/72A 1971-02-02 1972-01-24 Procedimento per fabbricare circui ti integrati con isolamento ossida to e struttura risultante IT948918B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11195671A 1971-02-02 1971-02-02

Publications (1)

Publication Number Publication Date
IT948918B true IT948918B (it) 1973-06-11

Family

ID=22341356

Family Applications (1)

Application Number Title Priority Date Filing Date
IT67198/72A IT948918B (it) 1971-02-02 1972-01-24 Procedimento per fabbricare circui ti integrati con isolamento ossida to e struttura risultante

Country Status (15)

Country Link
US (2) US3648125A (it)
JP (1) JPS5282081A (it)
AU (1) AU471388B2 (it)
BE (1) BE778810A (it)
CA (1) CA1106078A (it)
CH (1) CH528152A (it)
DE (1) DE2203183A1 (it)
FR (1) FR2124295B1 (it)
GB (1) GB1330790A (it)
IL (1) IL38262A (it)
IT (1) IT948918B (it)
NL (2) NL180467C (it)
SE (1) SE381535B (it)
SU (1) SU654198A3 (it)
YU (1) YU37043B (it)

Families Citing this family (144)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4916513A (en) * 1965-09-28 1990-04-10 Li Chou H Dielectrically isolated integrated circuit structure
US4946800A (en) * 1965-09-28 1990-08-07 Li Chou H Method for making solid-state device utilizing isolation grooves
US6849918B1 (en) * 1965-09-28 2005-02-01 Chou H. Li Miniaturized dielectrically isolated solid state device
US7038290B1 (en) 1965-09-28 2006-05-02 Li Chou H Integrated circuit device
US5696402A (en) * 1965-09-28 1997-12-09 Li; Chou H. Integrated circuit device
US6979877B1 (en) 1965-09-28 2005-12-27 Li Chou H Solid-state device
US5082793A (en) * 1965-09-28 1992-01-21 Li Chou H Method for making solid state device utilizing ion implantation techniques
USRE28653E (en) * 1968-04-23 1975-12-16 Method of fabricating semiconductor devices
NL170902C (nl) * 1970-07-10 1983-01-03 Philips Nv Halfgeleiderinrichting, in het bijzonder monolithische geintegreerde halfgeleiderschakeling.
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
NL170901C (nl) * 1971-04-03 1983-01-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
US3909318A (en) * 1971-04-14 1975-09-30 Philips Corp Method of forming complementary devices utilizing outdiffusion and selective oxidation
US6076652A (en) 1971-04-16 2000-06-20 Texas Instruments Incorporated Assembly line system and apparatus controlling transfer of a workpiece
US3751722A (en) * 1971-04-30 1973-08-07 Standard Microsyst Smc Mos integrated circuit with substrate containing selectively formed resistivity regions
NL166156C (nl) * 1971-05-22 1981-06-15 Philips Nv Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan.
NL7107040A (it) * 1971-05-22 1972-11-24
US3947299A (en) * 1971-05-22 1976-03-30 U.S. Philips Corporation Method of manufacturing semiconductor devices
US4965652A (en) * 1971-06-07 1990-10-23 International Business Machines Corporation Dielectric isolation for high density semiconductor devices
US3921283A (en) * 1971-06-08 1975-11-25 Philips Corp Semiconductor device and method of manufacturing the device
US4016594A (en) * 1971-06-08 1977-04-05 U.S. Philips Corporation Semiconductor device and method of manufacturing the device
US4396933A (en) * 1971-06-18 1983-08-02 International Business Machines Corporation Dielectrically isolated semiconductor devices
US3928091A (en) * 1971-09-27 1975-12-23 Hitachi Ltd Method for manufacturing a semiconductor device utilizing selective oxidation
US3828232A (en) * 1972-02-28 1974-08-06 Tokyo Shibaura Electric Co Semiconductor target
US3818289A (en) * 1972-04-10 1974-06-18 Raytheon Co Semiconductor integrated circuit structures
US3999213A (en) * 1972-04-14 1976-12-21 U.S. Philips Corporation Semiconductor device and method of manufacturing the device
IT979178B (it) * 1972-05-11 1974-09-30 Ibm Resistore per dispositivi a circuito integrato
US3861968A (en) * 1972-06-19 1975-01-21 Ibm Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition
US3961355A (en) * 1972-06-30 1976-06-01 International Business Machines Corporation Semiconductor device having electrically insulating barriers for surface leakage sensitive devices and method of forming
US4063271A (en) * 1972-07-26 1977-12-13 Texas Instruments Incorporated FET and bipolar device and circuit process with maximum junction control
SE361232B (it) * 1972-11-09 1973-10-22 Ericsson Telefon Ab L M
US3841918A (en) * 1972-12-01 1974-10-15 Bell Telephone Labor Inc Method of integrated circuit fabrication
DE2262297C2 (de) * 1972-12-20 1985-11-28 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau
NL161301C (nl) * 1972-12-29 1980-01-15 Philips Nv Halfgeleiderinrichting en werkwijze voor de vervaar- diging daarvan.
US3959812A (en) * 1973-02-26 1976-05-25 Hitachi, Ltd. High-voltage semiconductor integrated circuit
US3919005A (en) * 1973-05-07 1975-11-11 Fairchild Camera Instr Co Method for fabricating double-diffused, lateral transistor
US3873989A (en) * 1973-05-07 1975-03-25 Fairchild Camera Instr Co Double-diffused, lateral transistor structure
US3992232A (en) * 1973-08-06 1976-11-16 Hitachi, Ltd. Method of manufacturing semiconductor device having oxide isolation structure and guard ring
GB1457139A (en) * 1973-09-27 1976-12-01 Hitachi Ltd Method of manufacturing semiconductor device
US4136435A (en) * 1973-10-10 1979-01-30 Li Chou H Method for making solid-state device
JPS5214594B2 (it) * 1973-10-17 1977-04-22
US3886000A (en) * 1973-11-05 1975-05-27 Ibm Method for controlling dielectric isolation of a semiconductor device
US3962779A (en) * 1974-01-14 1976-06-15 Bell Telephone Laboratories, Incorporated Method for fabricating oxide isolated integrated circuits
NL180466C (nl) * 1974-03-15 1987-02-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam voorzien van een in het halfgeleiderlichaam verzonken patroon van isolerend materiaal.
US3920481A (en) * 1974-06-03 1975-11-18 Fairchild Camera Instr Co Process for fabricating insulated gate field effect transistor structure
US3919060A (en) * 1974-06-14 1975-11-11 Ibm Method of fabricating semiconductor device embodying dielectric isolation
US3945857A (en) * 1974-07-01 1976-03-23 Fairchild Camera And Instrument Corporation Method for fabricating double-diffused, lateral transistors
US3962717A (en) * 1974-10-29 1976-06-08 Fairchild Camera And Instrument Corporation Oxide isolated integrated injection logic with selective guard ring
US3993513A (en) * 1974-10-29 1976-11-23 Fairchild Camera And Instrument Corporation Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures
US3982266A (en) * 1974-12-09 1976-09-21 Texas Instruments Incorporated Integrated injection logic having high inverse current gain
US3988619A (en) * 1974-12-27 1976-10-26 International Business Machines Corporation Random access solid-state image sensor with non-destructive read-out
DE2510593C3 (de) * 1975-03-11 1982-03-18 Siemens AG, 1000 Berlin und 8000 München Integrierte Halbleiter-Schaltungsanordnung
US3954523A (en) * 1975-04-14 1976-05-04 International Business Machines Corporation Process for fabricating devices having dielectric isolation utilizing anodic treatment and selective oxidation
US3972754A (en) * 1975-05-30 1976-08-03 Ibm Corporation Method for forming dielectric isolation in integrated circuits
US4056415A (en) * 1975-08-04 1977-11-01 International Telephone And Telegraph Corporation Method for providing electrical isolating material in selected regions of a semiconductive material
US4025364A (en) * 1975-08-11 1977-05-24 Fairchild Camera And Instrument Corporation Process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases
JPS5922381B2 (ja) * 1975-12-03 1984-05-26 株式会社東芝 ハンドウタイソシノ セイゾウホウホウ
JPS5275989A (en) 1975-12-22 1977-06-25 Hitachi Ltd Production of semiconductor device
US4079408A (en) * 1975-12-31 1978-03-14 International Business Machines Corporation Semiconductor structure with annular collector/subcollector region
DE2605641C3 (de) * 1976-02-12 1979-12-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Hochfrequenztransistor und Verfahren zu seiner Herstellung
US4137109A (en) * 1976-04-12 1979-01-30 Texas Instruments Incorporated Selective diffusion and etching method for isolation of integrated logic circuit
US4118728A (en) * 1976-09-03 1978-10-03 Fairchild Camera And Instrument Corporation Integrated circuit structures utilizing conductive buried regions
US4149177A (en) * 1976-09-03 1979-04-10 Fairchild Camera And Instrument Corporation Method of fabricating conductive buried regions in integrated circuits and the resulting structures
US4228450A (en) * 1977-10-25 1980-10-14 International Business Machines Corporation Buried high sheet resistance structure for high density integrated circuits with reach through contacts
FR2413782A1 (fr) * 1977-12-30 1979-07-27 Radiotechnique Compelec Element de circuit integre destine aux memoires bipolaires a isolement lateral par oxyde
US4140558A (en) * 1978-03-02 1979-02-20 Bell Telephone Laboratories, Incorporated Isolation of integrated circuits utilizing selective etching and diffusion
US4172291A (en) * 1978-08-07 1979-10-23 Fairchild Camera And Instrument Corp. Preset circuit for information storage devices
US4269636A (en) * 1978-12-29 1981-05-26 Harris Corporation Method of fabricating self-aligned bipolar transistor process and device utilizing etching and self-aligned masking
US4466172A (en) * 1979-01-08 1984-08-21 American Microsystems, Inc. Method for fabricating MOS device with self-aligned contacts
US4670769A (en) * 1979-04-09 1987-06-02 Harris Corporation Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
US4276616A (en) * 1979-04-23 1981-06-30 Fairchild Camera & Instrument Corp. Merged bipolar/field-effect bistable memory cell
US4251300A (en) * 1979-05-14 1981-02-17 Fairchild Camera And Instrument Corporation Method for forming shaped buried layers in semiconductor devices utilizing etching, epitaxial deposition and oxide formation
US4289550A (en) * 1979-05-25 1981-09-15 Raytheon Company Method of forming closely spaced device regions utilizing selective etching and diffusion
US4677456A (en) * 1979-05-25 1987-06-30 Raytheon Company Semiconductor structure and manufacturing method
US4303933A (en) * 1979-11-29 1981-12-01 International Business Machines Corporation Self-aligned micrometer bipolar transistor device and process
US4333227A (en) * 1979-11-29 1982-06-08 International Business Machines Corporation Process for fabricating a self-aligned micrometer bipolar transistor device
US4252582A (en) * 1980-01-25 1981-02-24 International Business Machines Corporation Self aligned method for making bipolar transistor having minimum base to emitter contact spacing
JPS56127971A (en) * 1980-03-07 1981-10-07 Victor Co Of Japan Ltd Automatic tape loading device
US4318751A (en) * 1980-03-13 1982-03-09 International Business Machines Corporation Self-aligned process for providing an improved high performance bipolar transistor
US4274909A (en) * 1980-03-17 1981-06-23 International Business Machines Corporation Method for forming ultra fine deep dielectric isolation
US4339767A (en) * 1980-05-05 1982-07-13 International Business Machines Corporation High performance PNP and NPN transistor structure
US4412283A (en) * 1980-05-30 1983-10-25 Fairchild Camera & Instrument Corp. High performance microprocessor system
US4359816A (en) * 1980-07-08 1982-11-23 International Business Machines Corporation Self-aligned metal process for field effect transistor integrated circuits
US4758528A (en) * 1980-07-08 1988-07-19 International Business Machines Corporation Self-aligned metal process for integrated circuit metallization
US4545113A (en) * 1980-10-23 1985-10-08 Fairchild Camera & Instrument Corporation Process for fabricating a lateral transistor having self-aligned base and base contact
JPS6212508Y2 (it) * 1980-12-08 1987-04-01
US4398338A (en) * 1980-12-24 1983-08-16 Fairchild Camera & Instrument Corp. Fabrication of high speed, nonvolatile, electrically erasable memory cell and system utilizing selective masking, deposition and etching techniques
US4373252A (en) * 1981-02-17 1983-02-15 Fairchild Camera & Instrument Method for manufacturing a semiconductor structure having reduced lateral spacing between buried regions
US4418468A (en) * 1981-05-08 1983-12-06 Fairchild Camera & Instrument Corporation Process for fabricating a logic structure utilizing polycrystalline silicon Schottky diodes
US4374011A (en) * 1981-05-08 1983-02-15 Fairchild Camera & Instrument Corp. Process for fabricating non-encroaching planar insulating regions in integrated circuit structures
US4506435A (en) * 1981-07-27 1985-03-26 International Business Machines Corporation Method for forming recessed isolated regions
US4454647A (en) * 1981-08-27 1984-06-19 International Business Machines Corporation Isolation for high density integrated circuits
US4454646A (en) * 1981-08-27 1984-06-19 International Business Machines Corporation Isolation for high density integrated circuits
US4472873A (en) 1981-10-22 1984-09-25 Fairchild Camera And Instrument Corporation Method for forming submicron bipolar transistors without epitaxial growth and the resulting structure
US4617071A (en) * 1981-10-27 1986-10-14 Fairchild Semiconductor Corporation Method of fabricating electrically connected regions of opposite conductivity type in a semiconductor structure
US4419809A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Fabrication process of sub-micrometer channel length MOSFETs
US4419810A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Self-aligned field effect transistor process
CA1188418A (en) * 1982-01-04 1985-06-04 Jay A. Shideler Oxide isolation process for standard ram/prom and lateral pnp cell ram
US4961102A (en) * 1982-01-04 1990-10-02 Shideler Jay A Junction programmable vertical transistor with high performance transistor
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
US4443932A (en) * 1982-01-18 1984-04-24 Motorla, Inc. Self-aligned oxide isolated process and device
US4694566A (en) * 1982-04-12 1987-09-22 Signetics Corporation Method for manufacturing programmable read-only memory containing cells formed with opposing diodes
US4712125A (en) * 1982-08-06 1987-12-08 International Business Machines Corporation Structure for contacting a narrow width PN junction region
JPS5946065A (ja) * 1982-09-09 1984-03-15 Toshiba Corp 半導体装置の製造方法
US4507848A (en) * 1982-11-22 1985-04-02 Fairchild Camera & Instrument Corporation Control of substrate injection in lateral bipolar transistors
US4508757A (en) * 1982-12-20 1985-04-02 International Business Machines Corporation Method of manufacturing a minimum bird's beak recessed oxide isolation structure
JPS6042866A (ja) * 1983-08-19 1985-03-07 Toshiba Corp 半導体装置及びその製造方法
US4551906A (en) * 1983-12-12 1985-11-12 International Business Machines Corporation Method for making self-aligned lateral bipolar transistors
JPS6142955A (ja) * 1984-08-07 1986-03-01 Nec Corp 半導体装置の製造方法
US4860082A (en) * 1984-07-08 1989-08-22 Nec Corporation Bipolar transistor
EP0190070B1 (en) 1985-01-22 1992-08-26 Fairchild Semiconductor Corporation Semiconductor structure
US4686000A (en) * 1985-04-02 1987-08-11 Heath Barbara A Self-aligned contact process
US4619033A (en) * 1985-05-10 1986-10-28 Rca Corporation Fabricating of a CMOS FET with reduced latchup susceptibility
US4648173A (en) * 1985-05-28 1987-03-10 International Business Machines Corporation Fabrication of stud-defined integrated circuit structure
US4721682A (en) * 1985-09-25 1988-01-26 Monolithic Memories, Inc. Isolation and substrate connection for a bipolar integrated circuit
DE3751773T2 (de) * 1986-12-11 1996-11-28 Fairchild Semiconductor Modifiziertes isoplanares verfahren mit erhöhter dichte
US4849344A (en) * 1986-12-11 1989-07-18 Fairchild Semiconductor Corporation Enhanced density modified isoplanar process
US4775644A (en) * 1987-06-03 1988-10-04 Lsi Logic Corporation Zero bird-beak oxide isolation scheme for integrated circuits
US5014107A (en) * 1987-07-29 1991-05-07 Fairchild Semiconductor Corporation Process for fabricating complementary contactless vertical bipolar transistors
GB8726367D0 (en) * 1987-11-11 1987-12-16 Lsi Logic Ltd Cmos devices
US4847672A (en) 1988-02-29 1989-07-11 Fairchild Semiconductor Corporation Integrated circuit die with resistive substrate isolation of multiple circuits
US5094972A (en) * 1990-06-14 1992-03-10 National Semiconductor Corp. Means of planarizing integrated circuits with fully recessed isolation dielectric
US5289024A (en) * 1990-08-07 1994-02-22 National Semiconductor Corporation Bipolar transistor with diffusion compensation
US5059555A (en) * 1990-08-20 1991-10-22 National Semiconductor Corporation Method to fabricate vertical fuse devices and Schottky diodes using thin sacrificial layer
US5212102A (en) * 1990-08-22 1993-05-18 National Semiconductor Corporation Method of making polysilicon Schottky clamped transistor and vertical fuse devices
US5144404A (en) * 1990-08-22 1992-09-01 National Semiconductor Corporation Polysilicon Schottky clamped transistor and vertical fuse devices
JP3111500B2 (ja) * 1991-05-09 2000-11-20 富士電機株式会社 誘電体分離ウエハの製造方法
US5422289A (en) * 1992-04-27 1995-06-06 National Semiconductor Corporation Method of manufacturing a fully planarized MOSFET and resulting structure
US20040144999A1 (en) * 1995-06-07 2004-07-29 Li Chou H. Integrated circuit device
US6376293B1 (en) * 1999-03-30 2002-04-23 Texas Instruments Incorporated Shallow drain extenders for CMOS transistors using replacement gate design
KR100350648B1 (ko) * 2000-01-17 2002-08-28 페어차일드코리아반도체 주식회사 모스 트랜지스터 및 그 제조 방법
US6599781B1 (en) * 2000-09-27 2003-07-29 Chou H. Li Solid state device
US6613592B1 (en) 2002-04-25 2003-09-02 Taiwan Semiconductor Manufacturing Company IMD oxide crack monitor pattern and design rule
US7119401B2 (en) * 2004-01-07 2006-10-10 International Business Machines Corporation Tunable semiconductor diodes
US7095092B2 (en) * 2004-04-30 2006-08-22 Freescale Semiconductor, Inc. Semiconductor device and method of forming the same
JP5096708B2 (ja) * 2006-07-28 2012-12-12 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7691734B2 (en) * 2007-03-01 2010-04-06 International Business Machines Corporation Deep trench based far subcollector reachthrough
JP4759590B2 (ja) * 2008-05-09 2011-08-31 キヤノン株式会社 光電変換装置及びそれを用いた撮像システム
TWI405250B (zh) * 2010-04-13 2013-08-11 Richtek Technology Corp 半導體元件雜質濃度分布控制方法與相關半導體元件
CN102222609B (zh) * 2010-04-16 2013-07-31 立锜科技股份有限公司 半导体元件杂质浓度分布控制方法与相关半导体元件
US8525258B2 (en) * 2010-06-17 2013-09-03 Richtek Technology Corporation, R.O.C. Method for controlling impurity density distribution in semiconductor device and semiconductor device made thereby
WO2014205353A2 (en) * 2013-06-20 2014-12-24 Stratio, Inc. Gate-controlled charge modulated device for cmos image sensors
KR101885942B1 (ko) * 2014-11-19 2018-08-07 매그나칩 반도체 유한회사 반도체 소자 및 제조 방법
US11088031B2 (en) 2014-11-19 2021-08-10 Key Foundry Co., Ltd. Semiconductor and method of fabricating the same
US10872950B2 (en) 2016-10-04 2020-12-22 Nanohenry Inc. Method for growing very thick thermal local silicon oxide structures and silicon oxide embedded spiral inductors

Family Cites Families (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US28653A (en) * 1860-06-12 Tewonim-g-augek
CA861139A (en) * 1971-01-12 Kooi Else Method of manufacturing a semiconductor device and device manufactured by said method
NL251064A (it) * 1955-11-04
US2981877A (en) * 1959-07-30 1961-04-25 Fairchild Semiconductor Semiconductor device-and-lead structure
US3117260A (en) * 1959-09-11 1964-01-07 Fairchild Camera Instr Co Semiconductor circuit complexes
US3150299A (en) * 1959-09-11 1964-09-22 Fairchild Camera Instr Co Semiconductor circuit complex having isolation means
US3189798A (en) * 1960-11-29 1965-06-15 Westinghouse Electric Corp Monolithic semiconductor device and method of preparing same
US3136897A (en) * 1961-09-25 1964-06-09 Westinghouse Electric Corp Monolithic semiconductor structure comprising at least one junction transistor and associated diodes to form logic element
US3210620A (en) * 1961-10-04 1965-10-05 Westinghouse Electric Corp Semiconductor device providing diode functions
NL286507A (it) * 1961-12-11
US3241010A (en) * 1962-03-23 1966-03-15 Texas Instruments Inc Semiconductor junction passivation
US3210677A (en) * 1962-05-28 1965-10-05 Westinghouse Electric Corp Unipolar-bipolar semiconductor amplifier
US3296040A (en) * 1962-08-17 1967-01-03 Fairchild Camera Instr Co Epitaxially growing layers of semiconductor through openings in oxide mask
NL297601A (it) * 1962-09-07 Rca Corp
GB1047388A (it) * 1962-10-05
US3290753A (en) * 1963-08-19 1966-12-13 Bell Telephone Labor Inc Method of making semiconductor integrated circuit elements
US3341755A (en) * 1964-03-20 1967-09-12 Westinghouse Electric Corp Switching transistor structure and method of making the same
US3598664A (en) * 1964-12-29 1971-08-10 Texas Instruments Inc High frequency transistor and process for fabricating same
US3391023A (en) * 1965-03-29 1968-07-02 Fairchild Camera Instr Co Dielecteric isolation process
US3386865A (en) * 1965-05-10 1968-06-04 Ibm Process of making planar semiconductor devices isolated by encapsulating oxide filled channels
US3442011A (en) * 1965-06-30 1969-05-06 Texas Instruments Inc Method for isolating individual devices in an integrated circuit monolithic bar
US3615929A (en) * 1965-07-08 1971-10-26 Texas Instruments Inc Method of forming epitaxial region of predetermined thickness and article of manufacture
US3370995A (en) * 1965-08-02 1968-02-27 Texas Instruments Inc Method for fabricating electrically isolated semiconductor devices in integrated circuits
US3511702A (en) * 1965-08-20 1970-05-12 Motorola Inc Epitaxial growth process from an atmosphere composed of a hydrogen halide,semiconductor halide and hydrogen
US3404450A (en) * 1966-01-26 1968-10-08 Westinghouse Electric Corp Method of fabricating an integrated circuit structure including unipolar transistor and bipolar transistor portions
US3404451A (en) * 1966-06-29 1968-10-08 Fairchild Camera Instr Co Method of manufacturing semiconductor devices
US3489961A (en) * 1966-09-29 1970-01-13 Fairchild Camera Instr Co Mesa etching for isolation of functional elements in integrated circuits
GB1208578A (en) * 1966-10-05 1970-10-14 Philips Electronic Associated Methods of manufacturing semiconductor devices
NL153374B (nl) * 1966-10-05 1977-05-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze.
US3474308A (en) * 1966-12-13 1969-10-21 Texas Instruments Inc Monolithic circuits having matched complementary transistors,sub-epitaxial and surface resistors,and n and p channel field effect transistors
US3534234A (en) * 1966-12-15 1970-10-13 Texas Instruments Inc Modified planar process for making semiconductor devices having ultrafine mesa type geometry
FR1527898A (fr) * 1967-03-16 1968-06-07 Radiotechnique Coprim Rtc Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication
US3576683A (en) * 1967-04-07 1971-04-27 Sony Corp Transistor structure with thin, vaporgrown base layer
US3510735A (en) * 1967-04-13 1970-05-05 Scient Data Systems Inc Transistor with integral pinch resistor
NL6706735A (it) * 1967-05-13 1968-11-14
NL158024B (nl) * 1967-05-13 1978-09-15 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting en halfgeleiderinrichting verkregen door toepassing van de werkwijze.
US3506502A (en) * 1967-06-05 1970-04-14 Sony Corp Method of making a glass passivated mesa semiconductor device
US3575740A (en) * 1967-06-08 1971-04-20 Ibm Method of fabricating planar dielectric isolated integrated circuits
US3596149A (en) * 1967-08-16 1971-07-27 Hitachi Ltd Semiconductor integrated circuit with reduced minority carrier storage effect
US3514846A (en) * 1967-11-15 1970-06-02 Bell Telephone Labor Inc Method of fabricating a planar avalanche photodiode
US3575741A (en) * 1968-02-05 1971-04-20 Bell Telephone Labor Inc Method for producing semiconductor integrated circuit device and product produced thereby
US3488564A (en) * 1968-04-01 1970-01-06 Fairchild Camera Instr Co Planar epitaxial resistors
USRE28653E (en) 1968-04-23 1975-12-16 Method of fabricating semiconductor devices
US3649386A (en) * 1968-04-23 1972-03-14 Bell Telephone Labor Inc Method of fabricating semiconductor devices
US3550292A (en) * 1968-08-23 1970-12-29 Nippon Electric Co Semiconductor device and method of manufacturing the same
US3586542A (en) * 1968-11-22 1971-06-22 Bell Telephone Labor Inc Semiconductor junction devices
CH516871A (it) * 1969-07-30 1971-12-15 Soc Gen Semiconduttori Spa Procedimento per ottenere dispositivi a semiconduttore con minimi dislivelli in superficie, e dispositivo a semiconduttore ottenuto mediante detto procedimento
US3640806A (en) * 1970-01-05 1972-02-08 Nippon Telegraph & Telephone Semiconductor device and method of producing the same
NL170902C (nl) * 1970-07-10 1983-01-03 Philips Nv Halfgeleiderinrichting, in het bijzonder monolithische geintegreerde halfgeleiderschakeling.
NL159819B (nl) * 1970-09-10 1979-03-15 Philips Nv Halfgeleiderinrichting met een halfgeleiderlichaam, bevat- tende een transistor, waarbij een in het halfgeleiderli- chaam verzonken patroon van isolerend materiaal, dat door plaatselijke oxydatie van het halfgeleiderlichaam gevormd is, aanwezig is.
CH542517A (de) * 1970-07-10 1973-09-30 Philips Nv Halbleitervorrichtung mit einem Transistor und Verfahren zur Herstellung der Halbleitervorrichtung
US3736193A (en) * 1970-10-26 1973-05-29 Fairchild Camera Instr Co Single crystal-polycrystalline process for electrical isolation in integrated circuits
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
US3751722A (en) * 1971-04-30 1973-08-07 Standard Microsyst Smc Mos integrated circuit with substrate containing selectively formed resistivity regions
US3861968A (en) * 1972-06-19 1975-01-21 Ibm Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition
US3858231A (en) * 1973-04-16 1974-12-31 Ibm Dielectrically isolated schottky barrier structure and method of forming the same
US4118728A (en) * 1976-09-03 1978-10-03 Fairchild Camera And Instrument Corporation Integrated circuit structures utilizing conductive buried regions

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BE778810A (fr) 1972-05-30
NL180467C (nl) 1987-02-16
AU3612371A (en) 1973-05-31
YU17572A (en) 1981-11-13
NL8600620A (nl) 1986-07-01
JPS5282081A (en) 1977-07-08
SE381535B (sv) 1975-12-08
NL7201055A (it) 1972-08-04
IL38262A0 (en) 1972-01-27
JPS5528219B2 (it) 1980-07-26
FR2124295A1 (it) 1972-09-22
AU471388B2 (en) 1973-05-31
CA1106078A (en) 1981-07-28
YU37043B (en) 1984-08-31
FR2124295B1 (it) 1979-08-24
US3648125A (en) 1972-03-07
GB1330790A (en) 1973-09-19
SU654198A3 (ru) 1979-03-25
CH528152A (de) 1972-09-15
US6093620A (en) 2000-07-25
DE2203183A1 (de) 1972-08-10
NL180467B (nl) 1986-09-16
IL38262A (en) 1976-04-30

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