IT1314025B1 - Processo per sigillare selettivamente elementi capacitoriferroelettrici compresi in celle di memorie non volatili integrate su - Google Patents

Processo per sigillare selettivamente elementi capacitoriferroelettrici compresi in celle di memorie non volatili integrate su

Info

Publication number
IT1314025B1
IT1314025B1 IT1999MI002350A ITMI992350A IT1314025B1 IT 1314025 B1 IT1314025 B1 IT 1314025B1 IT 1999MI002350 A IT1999MI002350 A IT 1999MI002350A IT MI992350 A ITMI992350 A IT MI992350A IT 1314025 B1 IT1314025 B1 IT 1314025B1
Authority
IT
Italy
Prior art keywords
cells
volatile memories
ferroelectric capacitors
selectively sealing
capacitors included
Prior art date
Application number
IT1999MI002350A
Other languages
English (en)
Inventor
Raffaele Zambrano
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT1999MI002350A priority Critical patent/IT1314025B1/it
Publication of ITMI992350A0 publication Critical patent/ITMI992350A0/it
Priority to US09/710,066 priority patent/US6579727B1/en
Publication of ITMI992350A1 publication Critical patent/ITMI992350A1/it
Application granted granted Critical
Publication of IT1314025B1 publication Critical patent/IT1314025B1/it
Priority to US10/447,209 priority patent/US20050009209A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
IT1999MI002350A 1999-11-10 1999-11-10 Processo per sigillare selettivamente elementi capacitoriferroelettrici compresi in celle di memorie non volatili integrate su IT1314025B1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT1999MI002350A IT1314025B1 (it) 1999-11-10 1999-11-10 Processo per sigillare selettivamente elementi capacitoriferroelettrici compresi in celle di memorie non volatili integrate su
US09/710,066 US6579727B1 (en) 1999-11-10 2000-11-09 Process for selectively sealing ferroelectric capacitive elements incorporated in semiconductor integrated non-volatile memory cells
US10/447,209 US20050009209A1 (en) 1999-11-10 2003-05-27 Process for selectively sealing ferroelectric capactive elements incorporated in semiconductor integrated non-volatile memory cells

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT1999MI002350A IT1314025B1 (it) 1999-11-10 1999-11-10 Processo per sigillare selettivamente elementi capacitoriferroelettrici compresi in celle di memorie non volatili integrate su

Publications (3)

Publication Number Publication Date
ITMI992350A0 ITMI992350A0 (it) 1999-11-10
ITMI992350A1 ITMI992350A1 (it) 2001-05-10
IT1314025B1 true IT1314025B1 (it) 2002-12-03

Family

ID=11383931

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1999MI002350A IT1314025B1 (it) 1999-11-10 1999-11-10 Processo per sigillare selettivamente elementi capacitoriferroelettrici compresi in celle di memorie non volatili integrate su

Country Status (2)

Country Link
US (1) US6579727B1 (it)
IT (1) IT1314025B1 (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050009209A1 (en) * 1999-11-10 2005-01-13 Stmicroelectronics S.R.L. Process for selectively sealing ferroelectric capactive elements incorporated in semiconductor integrated non-volatile memory cells
JP4316188B2 (ja) * 2002-05-29 2009-08-19 富士通マイクロエレクトロニクス株式会社 半導体装置及びその製造方法
JP2006066515A (ja) * 2004-08-25 2006-03-09 Seiko Epson Corp 強誘電体メモリ及びその製造方法
JP2007073909A (ja) * 2005-09-09 2007-03-22 Oki Electric Ind Co Ltd 半導体メモリの製造方法
KR101434948B1 (ko) 2009-12-25 2014-08-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR102458660B1 (ko) 2016-08-03 2022-10-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치 및 전자 기기
CN111261634A (zh) * 2020-02-10 2020-06-09 无锡拍字节科技有限公司 一种存储器件的制造设备及其方法

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146299A (en) * 1990-03-02 1992-09-08 Westinghouse Electric Corp. Ferroelectric thin film material, method of deposition, and devices using same
WO1992006498A1 (en) 1990-09-28 1992-04-16 Seiko Epson Corporation Semiconductor device
JPH07111318A (ja) 1993-10-12 1995-04-25 Olympus Optical Co Ltd 強誘電体メモリ
US5438023A (en) 1994-03-11 1995-08-01 Ramtron International Corporation Passivation method and structure for a ferroelectric integrated circuit using hard ceramic materials or the like
US5965942A (en) * 1994-09-28 1999-10-12 Sharp Kabushiki Kaisha Semiconductor memory device with amorphous diffusion barrier between capacitor and plug
JP3113173B2 (ja) 1995-06-05 2000-11-27 シャープ株式会社 不揮発性ランダムアクセスメモリ及びその製造方法
JP3380373B2 (ja) * 1995-06-30 2003-02-24 三菱電機株式会社 半導体記憶装置及びその製造方法
JP3417167B2 (ja) * 1995-09-29 2003-06-16 ソニー株式会社 半導体メモリ素子のキャパシタ構造及びその形成方法
JPH1022466A (ja) 1996-03-01 1998-01-23 Motorola Inc 強誘電体不揮発性メモリ・セルおよびメモリ・セルの形成方法
US5716875A (en) 1996-03-01 1998-02-10 Motorola, Inc. Method for making a ferroelectric device
US5973342A (en) 1996-04-25 1999-10-26 Rohm Co., Ltd. Semiconductor device having an iridium electrode
US5811847A (en) 1996-06-28 1998-09-22 Symetrix Corporation PSZT for integrated circuit applications
US5990507A (en) * 1996-07-09 1999-11-23 Kabushiki Kaisha Toshiba Semiconductor device having ferroelectric capacitor structures
WO1998005071A1 (en) 1996-07-26 1998-02-05 Symetrix Corporation Method of fabricating an integrated circuit using self-patterned thin films
US6051858A (en) 1996-07-26 2000-04-18 Symetrix Corporation Ferroelectric/high dielectric constant integrated circuit and method of fabricating same
EP0837504A3 (en) 1996-08-20 1999-01-07 Ramtron International Corporation Partially or completely encapsulated ferroelectric device
US6043529A (en) 1996-09-30 2000-03-28 Siemens Aktiengesellschaft Semiconductor configuration with a protected barrier for a stacked cell
DE19640246A1 (de) 1996-09-30 1998-04-02 Siemens Ag Halbleiteranordnung mit geschützter Barriere für eine Stapelzelle
JP3587004B2 (ja) 1996-11-05 2004-11-10 ソニー株式会社 半導体メモリセルのキャパシタ構造及びその作製方法
JP3452763B2 (ja) * 1996-12-06 2003-09-29 シャープ株式会社 半導体記憶装置および半導体記憶装置の製造方法
US5750419A (en) 1997-02-24 1998-05-12 Motorola, Inc. Process for forming a semiconductor device having a ferroelectric capacitor
US5998296A (en) 1997-04-16 1999-12-07 Texas Instruments Incorporated Method of forming contacts and vias in semiconductor
JP3452800B2 (ja) * 1997-06-30 2003-09-29 ヒュンダイ エレクトロニクス インダストリーズ カムパニー リミテッド 高集積記憶素子およびその製造方法
JPH1154706A (ja) * 1997-08-06 1999-02-26 Nec Corp Ｍｉｍキャパシタ及びその製造方法
JP3090198B2 (ja) 1997-08-21 2000-09-18 日本電気株式会社 半導体装置の構造およびその製造方法
JP3445925B2 (ja) * 1997-10-07 2003-09-16 シャープ株式会社 半導体記憶素子の製造方法
US6037252A (en) 1997-11-05 2000-03-14 Tokyo Electron Limited Method of titanium nitride contact plug formation
US6313539B1 (en) * 1997-12-24 2001-11-06 Sharp Kabushiki Kaisha Semiconductor memory device and production method of the same
US5981382A (en) 1998-03-13 1999-11-09 Texas Instruments Incorporated PVD deposition process for CVD aluminum liner processing
JP2000021892A (ja) * 1998-06-26 2000-01-21 Nec Corp 半導体装置の製造方法
US6174735B1 (en) * 1998-10-23 2001-01-16 Ramtron International Corporation Method of manufacturing ferroelectric memory device useful for preventing hydrogen line degradation
US5956594A (en) * 1998-11-02 1999-09-21 Vanguard International Semiconductor Corporation Method for simultaneously forming capacitor plate and metal contact structures for a high density DRAM device
US6075264A (en) 1999-01-25 2000-06-13 Samsung Electronics Co., Ltd. Structure of a ferroelectric memory cell and method of fabricating it

Also Published As

Publication number Publication date
ITMI992350A0 (it) 1999-11-10
US6579727B1 (en) 2003-06-17
ITMI992350A1 (it) 2001-05-10

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