DE69930605D1 - Synchroner nichtflüchtiger mehrwertiger Speicher und Leseverfahren dafür - Google Patents

Synchroner nichtflüchtiger mehrwertiger Speicher und Leseverfahren dafür

Info

Publication number
DE69930605D1
DE69930605D1 DE69930605T DE69930605T DE69930605D1 DE 69930605 D1 DE69930605 D1 DE 69930605D1 DE 69930605 T DE69930605 T DE 69930605T DE 69930605 T DE69930605 T DE 69930605T DE 69930605 D1 DE69930605 D1 DE 69930605D1
Authority
DE
Germany
Prior art keywords
method therefor
reading method
valued memory
nonvolatile multi
synchronous nonvolatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69930605T
Other languages
English (en)
Inventor
Paolo Rolandi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69930605D1 publication Critical patent/DE69930605D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
DE69930605T 1999-05-31 1999-05-31 Synchroner nichtflüchtiger mehrwertiger Speicher und Leseverfahren dafür Expired - Lifetime DE69930605D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP99830331A EP1058269B1 (de) 1999-05-31 1999-05-31 Synchroner nichtflüchtiger mehrwertiger Speicher und Leseverfahren dafür

Publications (1)

Publication Number Publication Date
DE69930605D1 true DE69930605D1 (de) 2006-05-18

Family

ID=8243424

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69930605T Expired - Lifetime DE69930605D1 (de) 1999-05-31 1999-05-31 Synchroner nichtflüchtiger mehrwertiger Speicher und Leseverfahren dafür

Country Status (3)

Country Link
US (1) US6198660B1 (de)
EP (1) EP1058269B1 (de)
DE (1) DE69930605D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7073014B1 (en) * 2000-07-28 2006-07-04 Micron Technology, Inc. Synchronous non-volatile memory system
KR100769800B1 (ko) * 2001-12-26 2007-10-23 주식회사 하이닉스반도체 멀티 플레인 블럭 어드레스 레지스터
US7533214B2 (en) * 2002-02-27 2009-05-12 Microsoft Corporation Open architecture flash driver
US7010662B2 (en) * 2002-02-27 2006-03-07 Microsoft Corporation Dynamic data structures for tracking file system free space in a flash memory device
US7085879B2 (en) * 2002-02-27 2006-08-01 Microsoft Corporation Dynamic data structures for tracking data stored in a flash memory device
US6901499B2 (en) * 2002-02-27 2005-05-31 Microsoft Corp. System and method for tracking data stored in a flash memory device
US20030214867A1 (en) * 2002-05-17 2003-11-20 Matthew Goldman Serially sensing the output of multilevel cell arrays
US7093101B2 (en) * 2002-11-21 2006-08-15 Microsoft Corporation Dynamic data structures for tracking file system free space in a flash memory device
US7182649B2 (en) * 2003-12-22 2007-02-27 Panduit Corp. Inductive and capacitive coupling balancing electrical connector
US8812744B1 (en) 2013-03-14 2014-08-19 Microsoft Corporation Assigning priorities to data for hybrid drives
US9626126B2 (en) 2013-04-24 2017-04-18 Microsoft Technology Licensing, Llc Power saving mode hybrid drive access management
US9946495B2 (en) 2013-04-25 2018-04-17 Microsoft Technology Licensing, Llc Dirty data management for hybrid drives

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0392895B1 (de) * 1989-04-13 1995-12-13 Sundisk Corporation EEprom-System mit Blocklöschung
US5375097A (en) * 1993-06-29 1994-12-20 Reddy; Chitranjan N. Segmented bus architecture for improving speed in integrated circuit memories
US5497354A (en) * 1994-06-02 1996-03-05 Intel Corporation Bit map addressing schemes for flash memory
JP3925944B2 (ja) * 1996-07-10 2007-06-06 エルピーダメモリ株式会社 不揮発性半導体記憶装置
US5691956A (en) * 1996-07-17 1997-11-25 Chang; Edward C. M. Memory with fast decoding

Also Published As

Publication number Publication date
US6198660B1 (en) 2001-03-06
EP1058269B1 (de) 2006-03-29
EP1058269A1 (de) 2000-12-06

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Legal Events

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