DE19843470B4 - Integrierter Speicher mit Selbstreparaturfunktion - Google Patents

Integrierter Speicher mit Selbstreparaturfunktion Download PDF

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Publication number
DE19843470B4
DE19843470B4 DE19843470A DE19843470A DE19843470B4 DE 19843470 B4 DE19843470 B4 DE 19843470B4 DE 19843470 A DE19843470 A DE 19843470A DE 19843470 A DE19843470 A DE 19843470A DE 19843470 B4 DE19843470 B4 DE 19843470B4
Authority
DE
Germany
Prior art keywords
self
integrated memory
repair function
repair
function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19843470A
Other languages
English (en)
Other versions
DE19843470A1 (de
Inventor
Robert Kaiser
Helmut Schneider
Florian Schamberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE19843470A priority Critical patent/DE19843470B4/de
Priority to US09/401,388 priority patent/US6178124B1/en
Publication of DE19843470A1 publication Critical patent/DE19843470A1/de
Application granted granted Critical
Publication of DE19843470B4 publication Critical patent/DE19843470B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/835—Masking faults in memories by using spares or by reconfiguring using programmable devices with roll call arrangements for redundant substitutions
DE19843470A 1998-09-22 1998-09-22 Integrierter Speicher mit Selbstreparaturfunktion Expired - Fee Related DE19843470B4 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE19843470A DE19843470B4 (de) 1998-09-22 1998-09-22 Integrierter Speicher mit Selbstreparaturfunktion
US09/401,388 US6178124B1 (en) 1998-09-22 1999-09-22 Integrated memory having a self-repair function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19843470A DE19843470B4 (de) 1998-09-22 1998-09-22 Integrierter Speicher mit Selbstreparaturfunktion

Publications (2)

Publication Number Publication Date
DE19843470A1 DE19843470A1 (de) 2000-03-23
DE19843470B4 true DE19843470B4 (de) 2005-03-10

Family

ID=7881862

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19843470A Expired - Fee Related DE19843470B4 (de) 1998-09-22 1998-09-22 Integrierter Speicher mit Selbstreparaturfunktion

Country Status (2)

Country Link
US (1) US6178124B1 (de)
DE (1) DE19843470B4 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19836578C2 (de) * 1998-08-12 2000-08-17 Siemens Ag Integrierter Speicher mit Interblockredundanz
DE19921868C2 (de) 1999-05-11 2001-03-15 Siemens Ag Schaltungsanordnung zur Kontrolle von Zuständen einer Speichereinrichtung
US6725403B1 (en) * 1999-11-02 2004-04-20 Infineon Technologies Richmond, Lp Efficient redundancy calculation system and method for various types of memory devices
US6505313B1 (en) * 1999-12-17 2003-01-07 Lsi Logic Corporation Multi-condition BISR test mode for memories with redundancy
DE10005618A1 (de) * 2000-02-09 2001-08-30 Infineon Technologies Ag Integrierter Halbleiterspeicher mit redundanter Einheit von Speicherzellen
DE10063688A1 (de) * 2000-12-20 2002-07-18 Infineon Technologies Ag Schaltungsanordnung zur Ansteuerung einer programmierbaren Verbindung
DE10110469A1 (de) 2001-03-05 2002-09-26 Infineon Technologies Ag Integrierter Speicher und Verfahren zum Testen und Reparieren desselben
JP2004063023A (ja) * 2002-07-30 2004-02-26 Renesas Technology Corp 半導体記憶装置
US7719872B2 (en) * 2005-12-28 2010-05-18 Semiconductor Energy Laboratory Co., Ltd. Write-once nonvolatile memory with redundancy capability
WO2011089835A1 (en) * 2010-01-20 2011-07-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5313424A (en) * 1992-03-17 1994-05-17 International Business Machines Corporation Module level electronic redundancy
US5428625A (en) * 1990-06-13 1995-06-27 U.S. Philips Corporation Method of controlling a self-test in a data processing system and data processing system suitable for this method
DE19625626A1 (de) * 1996-06-26 1998-01-02 Siemens Ag Verfahren zum Betreiben einer Datenspeichereinrichtung, insbesondere einer fehlerhafte Speicherbereiche aufweisenden Datenspeichereinrichtung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0797145B1 (de) * 1996-03-22 2002-06-12 STMicroelectronics S.r.l. Sektoriziertes elektrisch löschbares und programmierbares nichtflüchtiges Speichergerät mit Redundanz
KR100250755B1 (ko) * 1996-12-28 2000-05-01 김영환 플래쉬 메모리 장치

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5428625A (en) * 1990-06-13 1995-06-27 U.S. Philips Corporation Method of controlling a self-test in a data processing system and data processing system suitable for this method
US5313424A (en) * 1992-03-17 1994-05-17 International Business Machines Corporation Module level electronic redundancy
DE19625626A1 (de) * 1996-06-26 1998-01-02 Siemens Ag Verfahren zum Betreiben einer Datenspeichereinrichtung, insbesondere einer fehlerhafte Speicherbereiche aufweisenden Datenspeichereinrichtung

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IEEE Standard Test Access Port and Boundary-Scan Architecture (IEEE Std 1149.1-1990). ISBN: 1-55937-350-4. 1993 *
TANABE, Akira, TAKESHIMA, Toshio, KOIKE Hiroki [u.a.]: A 30-ns 64-Mb DRAM with Built-in Self-Test and Self-Repair Function. In: IEEE j. solid-state circuits, Nov. 1992, Vol.27, No.11, S.1525-1531 *

Also Published As

Publication number Publication date
DE19843470A1 (de) 2000-03-23
US6178124B1 (en) 2001-01-23

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: INFINEON TECHNOLOGIES AG, 81669 MUENCHEN, DE

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee