IT1166776B - Apparecchiatura per effettuare il collegamento e il successivo riallacciamento di dispositivi a cpu su cammini differenti - Google Patents

Apparecchiatura per effettuare il collegamento e il successivo riallacciamento di dispositivi a cpu su cammini differenti

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Publication number
IT1166776B
IT1166776B IT22196/79A IT2219679A IT1166776B IT 1166776 B IT1166776 B IT 1166776B IT 22196/79 A IT22196/79 A IT 22196/79A IT 2219679 A IT2219679 A IT 2219679A IT 1166776 B IT1166776 B IT 1166776B
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IT
Italy
Prior art keywords
connection
subsequent
equipment
make
different ways
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IT22196/79A
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English (en)
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IT7922196A0 (it
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Ibm
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Publication of IT7922196A0 publication Critical patent/IT7922196A0/it
Application granted granted Critical
Publication of IT1166776B publication Critical patent/IT1166776B/it

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2005Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication controllers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G06F11/201Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media between storage system components
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177Initialisation or configuration control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2089Redundant storage control functionality

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Multi Processors (AREA)
IT22196/79A 1978-05-08 1979-04-27 Apparecchiatura per effettuare il collegamento e il successivo riallacciamento di dispositivi a cpu su cammini differenti IT1166776B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/904,050 US4207609A (en) 1978-05-08 1978-05-08 Method and means for path independent device reservation and reconnection in a multi-CPU and shared device access system

Publications (2)

Publication Number Publication Date
IT7922196A0 IT7922196A0 (it) 1979-04-27
IT1166776B true IT1166776B (it) 1987-05-06

Family

ID=25418457

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22196/79A IT1166776B (it) 1978-05-08 1979-04-27 Apparecchiatura per effettuare il collegamento e il successivo riallacciamento di dispositivi a cpu su cammini differenti

Country Status (13)

Country Link
US (1) US4207609A (it)
JP (1) JPS5838818B2 (it)
AU (1) AU521915B2 (it)
BR (1) BR7902718A (it)
CA (1) CA1116260A (it)
CH (1) CH637229A5 (it)
DE (1) DE2917441C3 (it)
ES (1) ES480295A1 (it)
FR (1) FR2425676B1 (it)
GB (1) GB2020456B (it)
IT (1) IT1166776B (it)
NL (1) NL7903614A (it)
SE (1) SE440960B (it)

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FR2425676B1 (fr) 1986-02-21
GB2020456B (en) 1982-10-13
GB2020456A (en) 1979-11-14
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AU521915B2 (en) 1982-05-06
AU4564079A (en) 1979-11-15
CH637229A5 (de) 1983-07-15
BR7902718A (pt) 1979-11-27
FR2425676A1 (fr) 1979-12-07
US4207609A (en) 1980-06-10
ES480295A1 (es) 1980-01-01
IT7922196A0 (it) 1979-04-27
CA1116260A (en) 1982-01-12
DE2917441B2 (de) 1981-04-16
JPS5838818B2 (ja) 1983-08-25
SE440960B (sv) 1985-08-26
DE2917441C3 (de) 1982-01-07
JPS54146941A (en) 1979-11-16
DE2917441A1 (de) 1979-11-15

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