HK1073708A1 - Interface circuit and data processing circuit - Google Patents

Interface circuit and data processing circuit

Info

Publication number
HK1073708A1
HK1073708A1 HK05106225A HK05106225A HK1073708A1 HK 1073708 A1 HK1073708 A1 HK 1073708A1 HK 05106225 A HK05106225 A HK 05106225A HK 05106225 A HK05106225 A HK 05106225A HK 1073708 A1 HK1073708 A1 HK 1073708A1
Authority
HK
Hong Kong
Prior art keywords
circuit
data processing
processing circuit
interface
interface circuit
Prior art date
Application number
HK05106225A
Other languages
English (en)
Inventor
Tetsuya Tokunaga
Hiroyuki Arai
Shuji Motegi
Takeshi Hibino
Takeshi Kimura
Original Assignee
Sanyo Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co filed Critical Sanyo Electric Co
Publication of HK1073708A1 publication Critical patent/HK1073708A1/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Electric Clocks (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
HK05106225A 2003-09-19 2005-07-22 Interface circuit and data processing circuit HK1073708A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003328898A JP3920830B2 (ja) 2003-09-19 2003-09-19 インターフェース回路、データ処理回路、データ処理システム、集積回路

Publications (1)

Publication Number Publication Date
HK1073708A1 true HK1073708A1 (en) 2005-10-14

Family

ID=34191405

Family Applications (1)

Application Number Title Priority Date Filing Date
HK05106225A HK1073708A1 (en) 2003-09-19 2005-07-22 Interface circuit and data processing circuit

Country Status (8)

Country Link
US (2) US7221198B2 (fr)
EP (1) EP1517217B1 (fr)
JP (1) JP3920830B2 (fr)
KR (1) KR100614169B1 (fr)
CN (2) CN1983104B (fr)
HK (1) HK1073708A1 (fr)
SG (1) SG110146A1 (fr)
TW (1) TWI246280B (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5073935B2 (ja) 2005-10-06 2012-11-14 オンセミコンダクター・トレーディング・リミテッド シリアルデータ入力システム
TWI332188B (en) * 2006-06-30 2010-10-21 Chimei Innolux Corp Discharge circuit and liquid crystal display device using the same
JP4931727B2 (ja) * 2007-08-06 2012-05-16 オンセミコンダクター・トレーディング・リミテッド データ通信システム
US9450585B2 (en) 2011-04-20 2016-09-20 Microchip Technology Incorporated Selecting four signals from sixteen inputs
US20120268162A1 (en) * 2011-04-21 2012-10-25 Microchip Technology Incorporated Configurable logic cells
CN103001901B (zh) * 2012-12-05 2015-07-22 哈尔滨工业大学 一种基于mdpcm的集成电路高速数字接口模块
CN109799870B (zh) * 2018-12-29 2021-03-05 深圳云天励飞技术有限公司 一种时钟控制电路及控制方法
WO2020144737A1 (fr) * 2019-01-08 2020-07-16 三菱電機株式会社 Dispositif de communication de données et procédé de communication de données

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60246149A (ja) 1984-05-21 1985-12-05 Mitsubishi Electric Corp デ−タ伝送装置
JPS6172439A (ja) 1984-09-18 1986-04-14 Sanyo Electric Co Ltd デ−タ転送方式
JPS61218246A (ja) 1985-03-25 1986-09-27 Nissan Motor Co Ltd 多重伝送装置
DE69032851T2 (de) 1989-09-29 1999-05-12 Fujitsu Ltd Integrierte Schaltung vom Josephson-Typ mit einer Ausgangsschnittstelle, welche die Ausgangsdaten mit reduzierter Taktfrequenz liefern kann
JP2917314B2 (ja) 1989-10-06 1999-07-12 日本電気株式会社 同期式半導体記憶装置
JPH04336724A (ja) 1991-05-13 1992-11-24 Matsushita Electric Ind Co Ltd シリアル受信装置
JPH05113952A (ja) 1991-10-23 1993-05-07 Nippon Telegr & Teleph Corp <Ntt> バス通信方法
GB2265283B (en) 1992-03-18 1995-10-25 Crystal Semiconductor Corp Resynchronization of a synchronous serial interface
JPH0637848A (ja) 1992-07-14 1994-02-10 Hitachi Ltd シリアル通信方式、及びシリアル通信装置
EP0589499B1 (fr) 1992-08-12 1999-04-07 Koninklijke Philips Electronics N.V. Système omnibus de communication à stations multiples ainsi que station maítre et station esclave destinées à être utilisées dans un tel système
JPH07288516A (ja) 1994-04-15 1995-10-31 Fujitsu Ltd シリアルデータ送受信回路
US5537062A (en) 1995-06-07 1996-07-16 Ast Research, Inc. Glitch-free clock enable circuit
US5654988A (en) * 1995-09-29 1997-08-05 Intel Corporation Apparatus for generating a pulse clock signal for a multiple-stage synchronizer
US5938746A (en) * 1996-02-29 1999-08-17 Sanyo Electric Co., Ltd. System for prioritizing slave input register to receive data transmission via bi-directional data line from master
US5644549A (en) * 1996-03-21 1997-07-01 Act Corporation Apparatus for accessing an extended data output dynamic random access memory
JPH10135994A (ja) 1996-10-30 1998-05-22 Oki Electric Ind Co Ltd 伝送装置
CN1189648A (zh) * 1997-01-31 1998-08-05 三菱电机株式会社 同步串行数据传送装置
US5808486A (en) * 1997-04-28 1998-09-15 Ag Communication Systems Corporation Glitch free clock enable circuit
JP3537290B2 (ja) 1997-05-27 2004-06-14 沖電気工業株式会社 シリアルインタフェース回路
CN1074551C (zh) * 1997-06-13 2001-11-07 邹清环 多路可编程逻辑信号发生器
US6263451B1 (en) * 1998-04-30 2001-07-17 Zenith Electronics Corporation Hardware implementation for a packet token generator of a high speed data server
JP3948141B2 (ja) * 1998-09-24 2007-07-25 富士通株式会社 半導体記憶装置及びその制御方法
JP3228413B2 (ja) 1998-10-29 2001-11-12 エヌイーシーマイクロシステム株式会社 シリアルデータ通信装置および通信方法
JP3573984B2 (ja) * 1998-12-15 2004-10-06 三洋電機株式会社 液晶駆動集積回路
JP3376315B2 (ja) * 1999-05-18 2003-02-10 日本電気株式会社 ビット同期回路
DE60108922T2 (de) * 2000-05-19 2005-12-29 Yazaki Corp. Phasenkomparator und Taktrückgewinnungsschaltung
GB0111300D0 (en) * 2001-05-09 2001-06-27 Mitel Knowledge Corp Method and apparatus for synchronizing slave network node to master network node
JP3698657B2 (ja) * 2001-06-12 2005-09-21 シャープ株式会社 ゲーティッドクロック生成回路及び回路修正方法
JP2003067324A (ja) 2001-08-29 2003-03-07 Oki Electric Ind Co Ltd インタフェース回路
JP3798292B2 (ja) * 2001-10-31 2006-07-19 富士通株式会社 データ同期化回路及び通信インターフェース回路
JP3652304B2 (ja) * 2001-11-29 2005-05-25 Necマイクロシステム株式会社 クロック生成回路及びクロック生成方法
JP3849100B2 (ja) 2003-09-12 2006-11-22 日本パルスモーター株式会社 同期動作制御ic

Also Published As

Publication number Publication date
SG110146A1 (en) 2005-04-28
TW200513073A (en) 2005-04-01
US20050129098A1 (en) 2005-06-16
KR20050028892A (ko) 2005-03-23
US7724060B2 (en) 2010-05-25
CN1983104A (zh) 2007-06-20
US20070241797A1 (en) 2007-10-18
EP1517217A3 (fr) 2006-09-20
JP3920830B2 (ja) 2007-05-30
US7221198B2 (en) 2007-05-22
JP2005094694A (ja) 2005-04-07
CN100349100C (zh) 2007-11-14
TWI246280B (en) 2005-12-21
KR100614169B1 (ko) 2006-08-25
EP1517217A2 (fr) 2005-03-23
EP1517217B1 (fr) 2013-06-19
CN1983104B (zh) 2013-02-27
CN1598738A (zh) 2005-03-23

Similar Documents

Publication Publication Date Title
EP1688816A4 (fr) Dispositif de traitement de donnees
AU2003250498A8 (en) Processing application data
AU2003260323A8 (en) Data processing method and device
AU2002366694A8 (en) Processing data
EP1517554A4 (fr) Dispositif de traitement de donnees
EP1560431A4 (fr) Dispositif de traitement de donnees
EP1603336A4 (fr) Dispositif et procede de traitement de donnees
GB0220788D0 (en) Processing digital data
EP1643768A4 (fr) Dispositif et procede de traitement de donnees
HK1073708A1 (en) Interface circuit and data processing circuit
EP1615433A4 (fr) Dispositif de traitement de donnees
EP1659486A4 (fr) Dispositif de traitement de donnees
GB2401502B (en) Data processing
EP1549062A4 (fr) Dispositif de traitement de donnees
GB0207967D0 (en) Data processing arrangement and method
GB0207969D0 (en) Data processing arrangement and method
GB0226697D0 (en) Processing of data
EP1608166A4 (fr) Dispositif de traitement de donnees
GB2409070C (en) Data processing device
GB2406922B (en) Data processing
GB2387092B (en) Data receiving circuit and method
AU2003232840A8 (en) Data processing circuit and method for transmitting data
GB2404515B (en) Processing digital data
EP1674986A4 (fr) Dispositif de traitement de donnees
GB0121108D0 (en) Processing data

Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20200917