HK1014612A1 - Semiconductor device. - Google Patents
Semiconductor device.Info
- Publication number
- HK1014612A1 HK1014612A1 HK98115925A HK98115925A HK1014612A1 HK 1014612 A1 HK1014612 A1 HK 1014612A1 HK 98115925 A HK98115925 A HK 98115925A HK 98115925 A HK98115925 A HK 98115925A HK 1014612 A1 HK1014612 A1 HK 1014612A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- semiconductor chip
- device hole
- superposition
- portions
- circuit substrate
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 6
- 239000000758 substrate Substances 0.000 abstract 5
- 239000000463 material Substances 0.000 abstract 3
- 239000004020 conductor Substances 0.000 abstract 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45599—Material
- H01L2224/456—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45644—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP08220793A JP3269171B2 (ja) | 1993-04-08 | 1993-04-08 | 半導体装置およびそれを有した時計 |
PCT/JP1994/000551 WO1994024698A1 (en) | 1993-04-08 | 1994-04-04 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
HK1014612A1 true HK1014612A1 (en) | 1999-09-30 |
Family
ID=13767983
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK98115925A HK1014612A1 (en) | 1993-04-08 | 1998-12-28 | Semiconductor device. |
Country Status (9)
Country | Link |
---|---|
US (1) | US5563445A (xx) |
EP (1) | EP0645806B1 (xx) |
JP (1) | JP3269171B2 (xx) |
KR (1) | KR100296834B1 (xx) |
CN (1) | CN1047470C (xx) |
DE (1) | DE69433543T2 (xx) |
HK (1) | HK1014612A1 (xx) |
TW (1) | TW301793B (xx) |
WO (1) | WO1994024698A1 (xx) |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5834339A (en) | 1996-03-07 | 1998-11-10 | Tessera, Inc. | Methods for providing void-free layers for semiconductor assemblies |
US6232152B1 (en) | 1994-05-19 | 2001-05-15 | Tessera, Inc. | Method of manufacturing a plurality of semiconductor packages and the resulting semiconductor package structures |
US6359335B1 (en) | 1994-05-19 | 2002-03-19 | Tessera, Inc. | Method of manufacturing a plurality of semiconductor packages and the resulting semiconductor package structures |
US5706174A (en) * | 1994-07-07 | 1998-01-06 | Tessera, Inc. | Compliant microelectrionic mounting device |
US6169328B1 (en) | 1994-09-20 | 2001-01-02 | Tessera, Inc | Semiconductor chip assembly |
US5915170A (en) * | 1994-09-20 | 1999-06-22 | Tessera, Inc. | Multiple part compliant interface for packaging of a semiconductor chip and method therefor |
US6870272B2 (en) | 1994-09-20 | 2005-03-22 | Tessera, Inc. | Methods of making microelectronic assemblies including compliant interfaces |
US5659952A (en) * | 1994-09-20 | 1997-08-26 | Tessera, Inc. | Method of fabricating compliant interface for semiconductor chip |
US6046076A (en) * | 1994-12-29 | 2000-04-04 | Tessera, Inc. | Vacuum dispense method for dispensing an encapsulant and machine therefor |
JP3643640B2 (ja) * | 1995-06-05 | 2005-04-27 | 株式会社東芝 | 表示装置及びこれに使用されるicチップ |
JP3270807B2 (ja) * | 1995-06-29 | 2002-04-02 | シャープ株式会社 | テープキャリアパッケージ |
US6284563B1 (en) * | 1995-10-31 | 2001-09-04 | Tessera, Inc. | Method of making compliant microelectronic assemblies |
US6211572B1 (en) | 1995-10-31 | 2001-04-03 | Tessera, Inc. | Semiconductor chip package with fan-in leads |
US6686015B2 (en) | 1996-12-13 | 2004-02-03 | Tessera, Inc. | Transferable resilient element for packaging of a semiconductor chip and method therefor |
JPH11260863A (ja) * | 1998-03-09 | 1999-09-24 | Sumitomo Electric Ind Ltd | 半導体装置用接続端子とその製造方法 |
FR2778475B1 (fr) * | 1998-05-11 | 2001-11-23 | Schlumberger Systems & Service | Carte a memoire du type sans contact, et procede de fabrication d'une telle carte |
KR20000012074A (ko) * | 1998-07-31 | 2000-02-25 | 야스카와 히데아키 | 반도체 장치 및 그 제조 방법, 반도체 장치의 제조 장치, 회로기판 및 전자 기기 |
JP3919972B2 (ja) | 1998-07-31 | 2007-05-30 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
US6214640B1 (en) | 1999-02-10 | 2001-04-10 | Tessera, Inc. | Method of manufacturing a plurality of semiconductor packages |
US6146984A (en) * | 1999-10-08 | 2000-11-14 | Agilent Technologies Inc. | Method and structure for uniform height solder bumps on a semiconductor wafer |
US6096649A (en) * | 1999-10-25 | 2000-08-01 | Taiwan Semiconductor Manufacturing Company | Top metal and passivation procedures for copper damascene structures |
US6833557B1 (en) * | 2000-06-27 | 2004-12-21 | Agere Systems Inc. | Integrated circuit and a method of manufacturing an integrated circuit |
JP3490987B2 (ja) * | 2001-07-19 | 2004-01-26 | 沖電気工業株式会社 | 半導体パッケージおよびその製造方法 |
JP4099673B2 (ja) * | 2004-12-21 | 2008-06-11 | セイコーエプソン株式会社 | 半導体装置 |
KR101357765B1 (ko) * | 2005-02-25 | 2014-02-11 | 테세라, 인코포레이티드 | 유연성을 갖는 마이크로 전자회로 조립체 |
TWI310983B (en) * | 2006-10-24 | 2009-06-11 | Au Optronics Corp | Integrated circuit structure, display module, and inspection method thereof |
US7749886B2 (en) | 2006-12-20 | 2010-07-06 | Tessera, Inc. | Microelectronic assemblies having compliancy and methods therefor |
US8045333B2 (en) * | 2008-01-14 | 2011-10-25 | Rosemount Inc. | Intrinsically safe compliant circuit element spacing |
TWI429000B (zh) * | 2010-07-08 | 2014-03-01 | Novatek Microelectronics Corp | 晶片線路扇出方法及薄膜晶片裝置 |
US9691686B2 (en) | 2014-05-28 | 2017-06-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contact pad for semiconductor device |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3871015A (en) * | 1969-08-14 | 1975-03-11 | Ibm | Flip chip module with non-uniform connector joints |
JPS53123074A (en) * | 1977-04-01 | 1978-10-27 | Nec Corp | Semiconductor device |
JPS601968A (ja) * | 1983-06-17 | 1985-01-08 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JPS6031244A (ja) * | 1983-08-01 | 1985-02-18 | Oki Electric Ind Co Ltd | 半導体装置 |
JPS6286737A (ja) * | 1985-10-11 | 1987-04-21 | Seiko Epson Corp | フエイスダウンボンデイング用基板 |
JPS6395639A (ja) * | 1986-10-09 | 1988-04-26 | Mitsubishi Electric Corp | テ−プキヤリア |
JP2623578B2 (ja) * | 1987-07-14 | 1997-06-25 | 日本電気株式会社 | 半導体集積回路装置 |
JPH01319957A (ja) * | 1988-06-21 | 1989-12-26 | Nec Corp | 集積回路 |
JPH03126237A (ja) * | 1989-10-12 | 1991-05-29 | Sumitomo Bakelite Co Ltd | 半導体装置の製造方法 |
JPH0574852A (ja) * | 1991-09-17 | 1993-03-26 | Nec Corp | 半導体装置 |
US5186383A (en) * | 1991-10-02 | 1993-02-16 | Motorola, Inc. | Method for forming solder bump interconnections to a solder-plated circuit trace |
US5198963A (en) * | 1991-11-21 | 1993-03-30 | Motorola, Inc. | Multiple integrated circuit module which simplifies handling and testing |
US5400950A (en) * | 1994-02-22 | 1995-03-28 | Delco Electronics Corporation | Method for controlling solder bump height for flip chip integrated circuit devices |
-
1993
- 1993-04-08 JP JP08220793A patent/JP3269171B2/ja not_active Expired - Lifetime
-
1994
- 1994-04-02 TW TW083102942A patent/TW301793B/zh not_active IP Right Cessation
- 1994-04-04 KR KR1019940704091A patent/KR100296834B1/ko not_active IP Right Cessation
- 1994-04-04 EP EP94910595A patent/EP0645806B1/en not_active Expired - Lifetime
- 1994-04-04 US US08/351,383 patent/US5563445A/en not_active Expired - Lifetime
- 1994-04-04 CN CN94190177A patent/CN1047470C/zh not_active Expired - Lifetime
- 1994-04-04 WO PCT/JP1994/000551 patent/WO1994024698A1/ja active IP Right Grant
- 1994-04-04 DE DE69433543T patent/DE69433543T2/de not_active Expired - Lifetime
-
1998
- 1998-12-28 HK HK98115925A patent/HK1014612A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0645806A4 (en) | 1995-10-11 |
KR950701769A (ko) | 1995-04-28 |
EP0645806B1 (en) | 2004-02-11 |
JP3269171B2 (ja) | 2002-03-25 |
US5563445A (en) | 1996-10-08 |
WO1994024698A1 (en) | 1994-10-27 |
DE69433543T2 (de) | 2004-12-23 |
EP0645806A1 (en) | 1995-03-29 |
KR100296834B1 (ko) | 2001-10-24 |
JPH06295939A (ja) | 1994-10-21 |
CN1047470C (zh) | 1999-12-15 |
DE69433543D1 (de) | 2004-03-18 |
TW301793B (xx) | 1997-04-01 |
CN1104415A (zh) | 1995-06-28 |
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Effective date: 20140403 |